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Automotive Image Recognition Processor: TMPV760 Series [New Product]

TMPV7602XBG image recognition processor with enhanced nighttime pedestrian recognition suitable for ADAS monocular-camera applications

This is a photo of TMPV7602XBG.

The TMPV7602XBG, a new addition to the TMPV760 Series, is specifically designed for front-view monitoring applications of advanced driver assistance systems (ADAS) using a monocular camera. The new processor consumes less power and is housed in a smaller package than its predecessor while maintaining the outstanding nighttime object recognition performance of the TMPV760 Series. This has been made possible by reducing the number of video input channels to one in accordance with the application requirement and by optimizing the circuit configuration. The 521-pin BGA package of the TMPV7602XBG measures only 17.0 mm × 17.0 mm and has a ball pitch of 0.65 mm. Thus, the TMPV7602XBG helps reduce the heat dissipation and the size of a camera module.

This is an image of image recognition system for front-view monitoring using a monocular camera.

This figure shows the block diagram of an image recognition system for front-view monitoring using a monocular camera.

Features

Accurate image recognition that enables nighttime object detection

The TMPV7602XBG provides an excellent image recognition performance equivalent to that of the TMPV760 Series. In order to achieve accurate image recognition even at nighttime and at scenes with minimal luminance differences between objects and the background, the integrated Enhanced CoHOG accelerator combines CoHOG (Co-occurrence Histograms of Oriented Gradients) with four other types of feature descriptors: color-based CoHOG, Co-occurrence Histograms of Pairs of Edge Orientations and Color Differences (CoHED), Co-occurrence Histograms of Color Differences (CoHD), and Color Histograms.

Reducing the size of a camera module owing to a small package and low power consumption

In order to help reduce the size of a monocular camera module for ADAS, the TMPV7602XBG is housed in a small 521-pin, 0.65-mm-pitch BGA package measuring only 17.0 mm × 17.0 mm. Its circuit configuration has been optimized with a single video input interface to achieve a small form factor. The design target for the power consumption of the TMPV7602XBG is 50%* that of the existing TMPV7608XBG. Additionally, the TMPV7602XBG incorporates a new power management unit, which can separately bring individual functional units into and out of standby mode.
* The TMPV7602XBG is still under development and its power consumption currently being measured.

TMPV7602XBG Block Diagram

Basic System Organization

This is the basic system configuration example of image recognition processor (TMPV7602XBG).

* The video input interface of the TMPV7602XBG has a 1-of-2 video switch.

Example of the basic system configuration for the TMPV7602XBG

General Specifications

Series Name / Product Name TMPV760 Series / TMPV7602XBG [Under development]
CPUs Toshiba original 32-bit RISC
Media embedded Processor (MeP) x 2 sets
Image Processing Engines Toshiba original 32-bit RISC Media Processing Engine
Media Processing Engine (MPE) with Double-precision
FPU x 4 sets with 256 KB L2 cache
Image Processing Accelerators Affine Transformation 2 ch (Lens Undistortion, Affine Transformation, Viewpoint Conversion, etc.)
Filter 2 ch (Smoothing, Edge Detection, Corner Detection, Oriented Gradient Computation, Color Space Conversion, Demosaicing, etc.)
Histogram 2 ch (Histogram, Image Conversion using LUT, etc.)
Histogram of Oriented Gradients(HOG) 2 ch (HOG/CoHOG Features + Linear Support Vector Machine)
Enhanced CoHOG 1 ch (HOG/CoHOG/Color-CoHOG Features etc. + Linear Support Vector Machine)
Matching 2 ch (Tracking, Motion Detection)
Pyramid 2 ch (Pyramid Image Generation)
On-chip Memories Masked ROM 80 KBytes
SRAM 1632 KBytes
On-chip Peripherals Video Input Interface Up to 2 ch (CMOS I/F: Up to 1 ch / max. SXGA, 60fps | MIPI® CSI-2 I/F: Up to 1ch / max. 1080p, 60fps) with Video Switch (2-input to 1-select)
Video Output Interface Up to 1 ch
External Memory Controllers DDR SDRAM Controller(LPDDR2-800)
Serial NOR Memory Controller (Single or Quad SPI)
Parallel SRAM / NOR Memory Controller
External MCU Interface 1 ch (8-bit bidirectional parallel input/output)
General-Purpose I/O 16-bits
CAN FD Controllers Up to 2 ch
CAN Controllers Up to 2 ch
I2C Interface Up to 4 ch
UART Interface Up to 5 ch (1ch for debug use only)
SPI Interface Up to 4 ch
PCM Interface Up to 2 ch
Operating Frequency 266.7 MHz max.
Operating Voltage Core: 1.1 V,
I/O: 3.3 V, 1.2 V (for LPDDR2 SDRAM), 1.2V (MIPI® CSI-2 I/F)
Package P-LFBGA 521-ball, 17.0 x 17.0 mm, 0.65 mm ball pitch
Product List

Product Lineup (Parametric Search)
View the product list of image recognition processors to find products that meet your performance specifications.

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