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Restriction on Use of Load Instruction for Flag-Register

Product name:
TOSHIBA Microcontrollers T4X Series

Dear Customer

With regard to our T4X Series of 4-bit microcontrollers, Toshiba have found that the following problem may occur when some data is loaded from Work RAM to Flag-Register. If this issue presents you with any problem, please contact your local Toshiba sales office.

Memory Bank Information (DMB) for Work RAM may have an unexpected value when executing Load Instruction from Work RAM to Flag-Register.
Condition 1: execute “LD F,M” instruction
Condition 2: execute “LDB AF,M” instruction
If you execute writing operations to Memory Bank information (DMB 2, 3) at Flag-Register in any of the two above-mentioned conditions, a problem may occur.
Do not use both instructions, “LD F,M” and “LDB AF,M”.


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