TMPM4G9  V1.0.0.0

LOSC Control Register. More...

Macros

#define RLMLOSCCR_XTEN_RW_DISABLE   ((uint32_t)0x00000000)
 
#define RLMLOSCCR_XTEN_RW_ENABLE   ((uint32_t)0x00000001)
 

Detailed Description

LOSC Control Register.

Detail.

Bit Bit Symbol
31:1 -
0 XTEN

Macro Definition Documentation

§ RLMLOSCCR_XTEN_RW_DISABLE

#define RLMLOSCCR_XTEN_RW_DISABLE   ((uint32_t)0x00000000)

XTEN :[R/W] :Disable

§ RLMLOSCCR_XTEN_RW_ENABLE

#define RLMLOSCCR_XTEN_RW_ENABLE   ((uint32_t)0x00000001)

XTEN :[R/W] :Enable