TMPM4G9
V1.0.0.0
|
HOSC warming up Register. More...
Macros | |
#define | CGWUPHCR_WUPT_HIGH_MASK ((uint32_t)0xFFF00000) |
#define | CGWUPHCR_WUCLK_MASK ((uint32_t)0x00000100) |
#define | CGWUPHCR_WUCLK_RW_IHOSC ((uint32_t)0x00000000) |
#define | CGWUPHCR_WUCLK_RW_EHOSC ((uint32_t)0x00000100) |
#define | CGWUPHCR_WUEF_MASK ((uint32_t)0x00000002) |
#define | CGWUPHCR_WUEF_R_DONE ((uint32_t)0x00000000) |
#define | CGWUPHCR_WUEF_R_RUNNING ((uint32_t)0x00000002) |
#define | CGWUPHCR_WUPT_HIGH_MASK ((uint32_t)0xFFF00000) |
#define | CGWUPHCR_WUCLK_MASK ((uint32_t)0x00000100) |
#define | CGWUPHCR_WUCLK_RW_IHOSC ((uint32_t)0x00000000) |
#define | CGWUPHCR_WUCLK_RW_EHOSC ((uint32_t)0x00000100) |
#define | CGWUPHCR_WUEF_MASK ((uint32_t)0x00000002) |
#define | CGWUPHCR_WUEF_R_DONE ((uint32_t)0x00000000) |
#define | CGWUPHCR_WUEF_R_RUNNING ((uint32_t)0x00000002) |
HOSC warming up Register.
Detail.
Bit | Bit Symbol |
---|---|
31:20 | WUPT |
19:16 | WUPT |
15:9 | - |
8 | WUCLK |
7:2 | - |
1 | WUEF |
0 | WUON |
#define CGWUPHCR_WUCLK_MASK ((uint32_t)0x00000100) |
WUCLK :Mask.
#define CGWUPHCR_WUCLK_MASK ((uint32_t)0x00000100) |
WUCLK :Mask.
#define CGWUPHCR_WUCLK_RW_EHOSC ((uint32_t)0x00000100) |
WUCLK :[R/W] :EHOSC
#define CGWUPHCR_WUCLK_RW_EHOSC ((uint32_t)0x00000100) |
WUCLK :[R/W] :EHOSC
#define CGWUPHCR_WUCLK_RW_IHOSC ((uint32_t)0x00000000) |
WUCLK :[R/W] :IHOSC
#define CGWUPHCR_WUCLK_RW_IHOSC ((uint32_t)0x00000000) |
WUCLK :[R/W] :IHOSC
#define CGWUPHCR_WUEF_MASK ((uint32_t)0x00000002) |
WUEF :Mask.
#define CGWUPHCR_WUEF_MASK ((uint32_t)0x00000002) |
WUEF :Mask.
#define CGWUPHCR_WUEF_R_DONE ((uint32_t)0x00000000) |
WUEF :[R] :Done
#define CGWUPHCR_WUEF_R_DONE ((uint32_t)0x00000000) |
WUEF :[R] :Done
#define CGWUPHCR_WUEF_R_RUNNING ((uint32_t)0x00000002) |
WUEF :[R] :Running
#define CGWUPHCR_WUEF_R_RUNNING ((uint32_t)0x00000002) |
WUEF :[R] :Running
#define CGWUPHCR_WUPT_HIGH_MASK ((uint32_t)0xFFF00000) |
WUPT :High Bit Mask.
#define CGWUPHCR_WUPT_HIGH_MASK ((uint32_t)0xFFF00000) |
WUPT :High Bit Mask.