Data Structures

Here are the data structures with brief descriptions:

Cadc_ch_initial_setting_t	Initialize Setting
Cadc_ch_t	ADC handle structure definition
Cadc_channel_setting_t	Channel Setting.
Cadc_clock_t	Clock information structure definition
Cadc_cmpx_t	Clock information structure definition
Cadc_initial_setting_t	Initial setting structure definition
Cadc_internal_info_t	Driver internal information structure definition
Cadc_t	ADC handle structure definition
Ccec_initial_setting_t	Initial setting structure definition
Ccec_receive_t	Receive event information structure definition
Ccec_t	CEC handle structure definition
Ccec_transmit_t	Transmit data information structure definition
Ccg_t	CG member
Ccontrol_data_t	Control data structure definition
Cfuart_boudrate_t	Boudrate setting structure definition
Cfuart_initial_setting_t	Initial setting structure definition
Cfuart_mdma_initial_setting_t	FUART MDMA initial setting structure definition
Cfuart_mdma_setting_t	MDMA setting structure definition
Cfuart_mdma_t	FUART MDMA handle structure definition
Cfuart_receive_t	Receive event information structure definition
Cfuart_rx_int_t	Receive FIFO setting
Cfuart_t	FUART handle structure definition
Cfuart_transmit_t	Transmit data information structure definition
Cfuart_tx_int_t	Transmit FIFO setting
Chdma_ch_cfg_t	Channel config setting structure definition
Chdma_ch_cnt_t	Channel control setting structure definition
Chdma_ch_setting_t	Channel setting structure definition
Chdma_handle	HDMA handle structure definition
Chdma_initial_setting_t	Initial setting structure definition
CI2C_clock_setting_t	Clock setting structure definition
Ci2c_dma_initial_setting_t	I2C DMA initial setting structure definition
Ci2c_dma_internal_info_t	I2C DMA internal information structure definition
Ci2c_dma_t	I2C DMA handle structure definition
CI2C_initial_setting_t	Initial setting structure definition
CI2C_t	I2C handle structure definition
CI2CS_initial_setting_t	Initial setting structure definition
CI2CS_wup_setting_t	Wakeup Control setting structure definition
Cmdma_bit_t	Ch bit structure definition
Cmdma_ch_bit_t	Mdma ch bit union definition
Cmdma_ch_interrupt_setting_t	Channel setting structure definition
Cmdma_descriptor_address_t	Descriptor base address definition
Cmdma_descriptor_set_t	Descriptor setting structure definition
Cmdma_descriptor_table_t	Descriptor Table structure definition
Cmdma_handle	MDMA handle structure definition
CSMIF_clock_setting_t	Clock setting structure definition
CSMIF_direct_setting_t	Direct Read setting structure definition
CSMIF_initial_setting_t	Initial setting structure definition
CSMIF_mapping_setting_t	Mapping setting structure definition
CSMIF_t	SMIF handle structure definition
Ct32a_capcrx_t	Capture Control Setting structure definition
Ct32a_capx0_t	T32A Capture Register x0 Setting structure definition
Ct32a_capx1_t	T32A Capture Register x0 Setting structure definition
Ct32a_crx_t	Counter Register Control Setting structure definition
Ct32a_dma_req_t	DMA Request register setting structure definition
Ct32a_handle	T32A handle structure definition
Ct32a_imx_t	Interrupt mask register Setting structure definition
Ct32a_initial_mode_t	Initial Mode setting structure definition
Ct32a_initial_setting_t	Initial Timer setting structure definition
Ct32a_mode_t	TimerA Mode Setting structure definition
Ct32a_outcrx0_t	TimerA Output Control Setting structure definition
Ct32a_outcrx1_t	T32AxOUTA Control Setting structure definition
Ct32a_pulse_cr_t	Pulse Count Control register setting structure definition
Ct32a_reldx_t	T32A Counter Reload Register Setting structure definition
Ct32a_rgx0_t	T32A Timer Register x0 Setting structure definition
Ct32a_rgx1_t	T32A Timer Register x1 Setting structure definition
Ct32a_runx_t	TimerA Run Control Setting structure definition
Ct32a_stx_t	Status register structure definition
Ct32a_tmrx_t	T32A Counter Capture Register A Setting structure definition
Ctspi_baudrate_t	Clock setting structure definition
Ctspi_control1_t	Control Setting structure definition
Ctspi_control2_t	Control Setting structure definition
Ctspi_control3_t	Control Setting structure definition
Ctspi_dma_initial_setting_t	TSPI DMA initial setting structure definition
Ctspi_dma_setting_t	DMA setting structure definition
Ctspi_dma_t	TSPI DMA handle structure definition
Ctspi_error_t	Error flag
Ctspi_fmtr0_t	Format control0
Ctspi_fmtr1_t	Format control1
Ctspi_handle	TSPI handle structure definition
Ctspi_initial_setting_t	Initial setting structure definition
Ctspi_receive16_t	Receive event information structure definition
Ctspi_receive32_t	Receive event information structure definition
Ctspi_receive8_t	Receive event information structure definition
Ctspi_receive_t	Receive event information structure definition
Ctspi_status_t	Status register
Ctspi_transmit16_t	Transmit data information structure definition
Ctspi_transmit32_t	Transmit data information structure definition
Ctspi_transmit8_t	Transmit data information structure definition
Ctspi_transmit_t	Transmit data information structure definition
Cuart_boudrate_t	Boudrate setting structure definition
Cuart_clock_t	Clock setting structure definition
Cuart_initial_setting_t	Initial setting structure definition
Cuart_mdma_initial_setting_t	UART MDMA initial setting structure definition
Cuart_mdma_setting_t	MDMA setting structure definition
Cuart_mdma_t	UART MDMA handle structure definition
Cuart_receive16_t	Receive event information structure definition
Cuart_receive8_t	Receive event information structure definition
Cuart_receive_t	Receive event information structure definition
Cuart_rx_fifo_t	Receive FIFO setting
Cuart_t	UART handle structure definition
Cuart_transmit16_t	Transmit data information structure definition
Cuart_transmit8_t	Transmit data information structure definition
Cuart_transmit_t	Transmit data information structure definition
Cuart_tx_fifo_t	Transmit FIFO setting