Clock Generator (CG)
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#include <TMPM4G6.h>
§ EXTEND2
Extend for MDMAC Register
§ FCEN
§ FSYSENA
High fsys Supply Stop Register A
§ FSYSMENA
Middle fsys Supply Stop Register A
§ FSYSMENB
Middle fsys Supply Stop Register A
§ OSCCR
Oscillation Control Register
§ PLL0SEL
§ PROTECT
§ RESERVED0
§ RESERVED1
§ RESERVED2
§ RESERVED3
§ RESERVED4
§ SPCLKEN
ADC TRACE Clock Supply Stop Register
§ STBYCR
§ SYSCR
System Clock Control Register
§ WUPHCR
High OSC Warming-up Register
§ WUPLCR
Low OSC Warming-up Register
The documentation for this struct was generated from the following files:
- C:/W_JOB(TOSHIBA)/TMPM4G9/release/TMPM4G9_release_20190424/TMPM4G9_V1000/Libraries/CMSIS/TMPM4G6.h
- C:/W_JOB(TOSHIBA)/TMPM4G9/release/TMPM4G9_release_20190424/TMPM4G9_V1000/Libraries/CMSIS/TMPM4G7.h
- C:/W_JOB(TOSHIBA)/TMPM4G9/release/TMPM4G9_release_20190424/TMPM4G9_V1000/Libraries/CMSIS/TMPM4G8.h
- C:/W_JOB(TOSHIBA)/TMPM4G9/release/TMPM4G9_release_20190424/TMPM4G9_V1000/Libraries/CMSIS/TMPM4G9.h