TMPM4G9
V1.0.0.0
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LOSC Control Register. More...
Macros | |
#define | RLMLOSCCR_XTEN_RW_DISABLE ((uint32_t)0x00000000) |
#define | RLMLOSCCR_XTEN_RW_ENABLE ((uint32_t)0x00000001) |
LOSC Control Register.
Detail.
Bit | Bit Symbol |
---|---|
31:1 | - |
0 | XTEN |
#define RLMLOSCCR_XTEN_RW_DISABLE ((uint32_t)0x00000000) |
XTEN :[R/W] :Disable
#define RLMLOSCCR_XTEN_RW_ENABLE ((uint32_t)0x00000001) |
XTEN :[R/W] :Enable