TMPM4G(1) Group Peripheral Driver User Manual  V1.0.0.0
txz_i2c.h
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1 
13 /*------------------------------------------------------------------------------*/
14 /* Define to prevent recursive inclusion */
15 /*------------------------------------------------------------------------------*/
16 #ifndef __I2C_H
17 #define __I2C_H
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 /*------------------------------------------------------------------------------*/
24 /* Includes */
25 /*------------------------------------------------------------------------------*/
26 #include "txz_driver_def.h"
27 
37 /*------------------------------------------------------------------------------*/
38 /* Macro Function */
39 /*------------------------------------------------------------------------------*/
45 /* no define */
46  /* End of group UTILITIES_Private_macro */
50 
51 
52 /*------------------------------------------------------------------------------*/
53 /* Configuration */
54 /*------------------------------------------------------------------------------*/
60 /* no define */
61  /* End of group UTILITIES_Private_define */
65 
66 
67 /*------------------------------------------------------------------------------*/
68 /* Macro Definition */
69 /*------------------------------------------------------------------------------*/
75 #ifdef DEBUG
76 
81 #define I2C_NULL ((void *)0)
82  /* End of name I2C_NULL Pointer */
85 #endif
86 
92 #define I2CxST_NACK ((uint32_t)0x00000008)
93 #define I2CxST_I2CBF ((uint32_t)0x00000004)
94 #define I2CxST_I2CAL ((uint32_t)0x00000002)
95 #define I2CxST_I2C ((uint32_t)0x00000001)
96 #define I2CxST_CLEAR ((uint32_t)0x0000000F) /* End of name I2CxST Macro Definition */
100 
106 #define I2CxCR1_ACK ((uint32_t)0x00000010)
107 #define I2CxCR1_NOACK ((uint32_t)0x00000008)
108 #define I2CxCR1_BC ((uint32_t)0x000000E0) /* End of name I2CxCR1 Macro Definition */
113 
119 #define I2CxDBR_DB_MASK ((uint32_t)0x000000FF) /* !< DB 7-0 bits mask. */
120  /* End of name I2CxDBR Macro Definition */
123 
124 
130 #define I2CxCR2_PIN_CLEAR ((uint32_t)0x00000010)
131 #define I2CxCR2_I2CM_DISABLE ((uint32_t)0x00000000)
132 #define I2CxCR2_I2CM_ENABLE ((uint32_t)0x00000008)
133 #define I2CxCR2_SWRES_10 ((uint32_t)0x00000002)
134 #define I2CxCR2_SWRES_01 ((uint32_t)0x00000001)
135 #define I2CxCR2_START_CONDITION ((uint32_t)0x000000F8)
136 #define I2CxCR2_STOP_CONDITION ((uint32_t)0x000000D8)
137 #define I2CxCR2_INIT ((uint32_t)0x00000008) /* End of name I2CxCR2 Macro Definition */
142 
148 #define I2CxSR_MST ((uint32_t)0x00000080)
149 #define I2CxSR_TRX ((uint32_t)0x00000040)
150 #define I2CxSR_BB ((uint32_t)0x00000020)
151 #define I2CxSR_PIN ((uint32_t)0x00000010)
152 #define I2CxSR_AL ((uint32_t)0x00000008)
153 #define I2CxSR_AAS ((uint32_t)0x00000004)
154 #define I2CxSR_AD0 ((uint32_t)0x00000002)
155 #define I2CxSR_LRB ((uint32_t)0x00000001) /* End of name I2CxSR Macro Definition */
159 
165 #define I2CxPRS_PRCK ((uint32_t)0x0000001F) /* End of name I2CxPRS Macro Definition */
169 
175 #define I2CxIE_SELPINCD ((uint32_t)0x00000040)
176 #define I2CxIE_DMARI2CTX ((uint32_t)0x00000020)
177 #define I2CxIE_DMARI2CRX ((uint32_t)0x00000010)
178 #define I2CxIE_I2C ((uint32_t)0x00000001)
179 #define I2CxIE_CLEAR ((uint32_t)0x00000000) /* End of name I2CxIE Macro Definition */
184 
185 
191 #define I2CxOP_DISAL ((uint32_t)0x00000080)
192 #define I2CxOP_SA2ST ((uint32_t)0x00000040)
193 #define I2CxOP_SAST ((uint32_t)0x00000020)
194 #define I2CxOP_NFSEL ((uint32_t)0x00000010)
195 #define I2CxOP_RSTA ((uint32_t)0x00000008)
196 #define I2CxOP_GCDI ((uint32_t)0x00000004)
197 #define I2CxOP_SREN ((uint32_t)0x00000002)
198 #define I2CxOP_MFACK ((uint32_t)0x00000001)
199 #ifndef I2C_MULTI_MASTER
200  #define I2CxOP_INIT ((uint32_t)0x00000084)
201 #else
202  #define I2CxOP_INIT ((uint32_t)0x00000004)
203 #endif
204 #define I2CxOP_SLAVE_INIT ((uint32_t)0x00000084) /* End of name I2CxOP Macro Definition */
208 
214 #define I2CxAR_ALS ((uint32_t)0x00000001)
215 #define I2CxAR_INIT ((uint32_t)0x00000000)
216 #define I2CxAR2_INIT ((uint32_t)0x00000000) /* End of name I2CxAR Macro Definition */
221 
222 
228 #define I2CxPM_SDA_SCL ((uint32_t)0x00000003) /* SDA and SCL level. */
229  /* End of name I2CxPM Macro Definition */
232 
238 #define I2CxWUPCR_INT_RELESE ((uint32_t)0x00000001) /* Interrupt Release. */
239 #define I2CxWUPCR_INT_HOLD ((uint32_t)0x00000000) /* Interrupt setting keep it. */
240  /* End of name I2CxWUPCR_INT Macro Definition */
243 
249 #define I2CxWUPCR_RST_RESET ((uint32_t)0x00000010) /* I2C BUS Reset. */
250 #define I2CxWUPCR_RST_RELEASE ((uint32_t)0x00000000) /* I2C BUS Reset Release. */
251  /* End of name I2CxWUPCR_RST Macro Definition */
254 
255 
261 #define I2CxWUPCR_ACK ((uint32_t)0x00000020) /* ACK Output. Output "0" */
262 #define I2CxWUPCR_NACK ((uint32_t)0x00000000) /* ACL No Output. Output "1" NACK Output */
263  /* End of name I2CxWUPCR_RST Macro Definition */ /* End of group UTILITIES_Private_define */
269 
270 
271 /*------------------------------------------------------------------------------*/
272 /* Enumerated Type Definition */
273 /*------------------------------------------------------------------------------*/
279 /* no define */
280  /* End of group UTILITIES_Private_define */
284 
285 /*------------------------------------------------------------------------------*/
286 /* Structure Definition */
287 /*------------------------------------------------------------------------------*/
293 /*----------------------------------*/
297 /*----------------------------------*/
298 typedef struct
299 {
300  uint32_t sck;
301  uint32_t prsck;
303 
304 /*----------------------------------*/
308 /*----------------------------------*/
309 typedef struct
310 {
311  uint32_t sgcdi;
312  uint32_t ack;
313  uint32_t reset;
314  uint32_t intend;
316 
317 /*----------------------------------*/
321 /*----------------------------------*/
322 typedef struct
323 {
326 
327 /*----------------------------------*/
331 /*----------------------------------*/
332 typedef struct
333 {
336 
337 /*----------------------------------*/
341 /*----------------------------------*/
342 typedef struct
343 {
344  TSB_I2C_TypeDef *p_instance;
346 } I2C_t;
347 #if defined(I2CSxWUP_EN)
348 /*----------------------------------*/
352 /*----------------------------------*/
353 typedef struct
354 {
355  TSB_I2CS_TypeDef *p_instance;
357 } I2CS_t;
358 #endif
359  /* End of group UTILITIES_Private_typedef */
362 
363 /*------------------------------------------------------------------------------*/
364 /* Inline Functions */
365 /*------------------------------------------------------------------------------*/
370 __STATIC_INLINE void I2C_reset(I2C_t *p_obj);
371 __STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj);
372 __STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj);
373 __STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj);
374 __STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data);
375 __STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj);
376 __STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack);
377 __STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj);
378 __STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj);
379 __STATIC_INLINE int32_t I2C_master(I2C_t *p_obj);
380 __STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj);
381 __STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj);
382 __STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj);
383 __STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj);
384 __STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx);
385 __STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj);
386 __STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr);
387 __STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj);
388 
389 /*--------------------------------------------------*/
395 /*--------------------------------------------------*/
396 __STATIC_INLINE void I2C_reset(I2C_t *p_obj)
397 {
398 #ifdef DEBUG
399  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
400  {
401  p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
402  p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
403  }
404 #else
405  p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
406  p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
407 #endif
408 }
409 
410 /*--------------------------------------------------*/
418 /*--------------------------------------------------*/
419 __STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj)
420 {
421 #ifdef DEBUG
422  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
423  {
424  return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
425  }
426  return (0);
427 #else
428  return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
429 #endif
430 }
431 
432 /*--------------------------------------------------*/
439 /*--------------------------------------------------*/
440 __STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj)
441 {
442 #ifdef DEBUG
443  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
444  {
445  p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
446  }
447 #else
448  p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
449 #endif
450 }
451 
452 /*--------------------------------------------------*/
459 /*--------------------------------------------------*/
460 __STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj)
461 {
462 #ifdef DEBUG
463  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
464  {
465  return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
466  }
467  return (0);
468 #else
469  return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
470 #endif
471 }
472 
473 /*--------------------------------------------------*/
481 /*--------------------------------------------------*/
482 __STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data)
483 {
484 #ifdef DEBUG
485  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
486  {
487  p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
488  }
489 #else
490  p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
491 #endif
492 }
493 
494 /*--------------------------------------------------*/
502 /*--------------------------------------------------*/
503 __STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj)
504 {
505 #ifdef DEBUG
506  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
507  {
508  __IO uint32_t opreg = p_obj->p_instance->OP;
509  p_obj->p_instance->OP &= ~I2CxOP_RSTA;
510  return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
511  }
512  return (0);
513 #else
514  __IO uint32_t opreg = p_obj->p_instance->OP;
515  p_obj->p_instance->OP &= ~I2CxOP_RSTA;
516  return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
517 #endif
518 }
519 
520 /*--------------------------------------------------*/
528 /*--------------------------------------------------*/
529 __STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack)
530 {
531 #ifdef DEBUG
532  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
533  {
534  if (nack)
535  {
536  p_obj->p_instance->OP |= I2CxOP_MFACK;
537  }
538  else
539  {
540  p_obj->p_instance->OP &= ~I2CxOP_MFACK;
541  }
542  }
543 #else
544  if (nack)
545  {
546  p_obj->p_instance->OP |= I2CxOP_MFACK;
547  }
548  else
549  {
550  p_obj->p_instance->OP &= ~I2CxOP_MFACK;
551  }
552 #endif
553 }
554 
555 /*--------------------------------------------------*/
563 /*--------------------------------------------------*/
564 __STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj)
565 {
566 #ifdef DEBUG
567  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
568  {
569  return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
570  }
571  return (0);
572 #else
573  return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
574 #endif
575 }
576 
577 /*--------------------------------------------------*/
585 /*--------------------------------------------------*/
586 __STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj)
587 {
588 #ifdef DEBUG
589  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
590  {
591  return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
592  }
593  return (0);
594 #else
595  return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
596 #endif
597 }
598 
599 /*--------------------------------------------------*/
607 /*--------------------------------------------------*/
608 __STATIC_INLINE int32_t I2C_master(I2C_t *p_obj)
609 {
610 #ifdef DEBUG
611  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
612  {
613  return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
614  }
615  return (0);
616 #else
617  return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
618 #endif
619 }
620 
621 /*--------------------------------------------------*/
629 /*--------------------------------------------------*/
630 __STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj)
631 {
632 #ifdef DEBUG
633  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
634  {
635  return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
636  }
637  return (0);
638 #else
639  return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
640 #endif
641 }
642 
643 /*--------------------------------------------------*/
651 /*--------------------------------------------------*/
652 __STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj)
653 {
654 #ifdef DEBUG
655  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
656  {
657  return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
658  }
659  return (0);
660 #else
661  return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
662 #endif
663 }
664 
665 /*--------------------------------------------------*/
672 /*--------------------------------------------------*/
673 __STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj)
674 {
675 #ifdef DEBUG
676  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
677  {
678  p_obj->p_instance->ST = I2CxST_CLEAR;
679  }
680 #else
681  p_obj->p_instance->ST = I2CxST_CLEAR;
682 #endif
683 }
684 
685 /*--------------------------------------------------*/
692 /*--------------------------------------------------*/
693 __STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj)
694 {
695 #ifdef DEBUG
696  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
697  {
698  p_obj->p_instance->IE = I2CxIE_I2C;
699  }
700 #else
701  p_obj->p_instance->IE = I2CxIE_I2C;
702 #endif
703 }
704 
705 /*--------------------------------------------------*/
713 /*--------------------------------------------------*/
714 __STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx)
715 {
716 #ifdef DEBUG
717  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
718  {
719  if (tx)
720  {
722  }
723  else
724  {
726  }
727  }
728 #else
729  if (tx)
730  {
732  }
733  else
734  {
736  }
737 #endif
738 }
739 
740 /*--------------------------------------------------*/
747 /*--------------------------------------------------*/
748 __STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj)
749 {
750 #ifdef DEBUG
751  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
752  {
753  p_obj->p_instance->IE = I2CxIE_CLEAR;
754  }
755 #else
756  p_obj->p_instance->IE = I2CxIE_CLEAR;
757 #endif
758 }
759 
760 /*--------------------------------------------------*/
768 /*--------------------------------------------------*/
769 __STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr)
770 {
771 #ifdef DEBUG
772  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
773  {
774  p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
775  p_obj->p_instance->AR2 = I2CxAR2_INIT;
776  }
777 #else
778  p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
779  p_obj->p_instance->AR2 = I2CxAR2_INIT;
780 #endif
781 }
782 
783 /*--------------------------------------------------*/
790 /*--------------------------------------------------*/
791 __STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj)
792 {
793 #ifdef DEBUG
794  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
795  {
796  return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
797  && ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
798  }
799  return (0);
800 #else
801  return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
802  && ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
803 #endif
804 }
805  /* End of group UTILITIES_Private_functions */
809 
810 /*------------------------------------------------------------------------------*/
811 /* Functions */
812 /*------------------------------------------------------------------------------*/
817 void I2C_init(I2C_t *p_obj);
818 void I2C_start_condition(I2C_t *p_obj, uint32_t data);
819 uint32_t I2C_get_clock_setting(I2C_t *p_obj, uint32_t frequency, uint32_t fsys, I2C_clock_setting_t *p_setting);
820 void I2C_slave_init(I2C_t *p_obj);
821 #if defined(I2CSxWUP_EN)
822 void I2CS_init(I2CS_t *p_obj);
823 void I2CS_Primary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
824 void I2CS_Secondary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
825 #endif
826  /* End of group UTILITIES_Private_functions */
829  /* End of group UTILITIES */
833  /* End of group Example */
837 
838 #ifdef __cplusplus
839 }
840 #endif /* __cplusplus */
841 #endif /* __I2C_H */
842 
843 
void I2C_slave_init(I2C_t *p_obj)
#define I2CxOP_MFACK
Definition: txz_i2c.h:198
#define I2CxSR_TRX
Definition: txz_i2c.h:149
#define I2CxDBR_DB_MASK
Definition: txz_i2c.h:119
#define I2CxIE_SELPINCD
Definition: txz_i2c.h:175
TSB_I2C_TypeDef * p_instance
Definition: txz_i2c.h:344
Wakeup Control setting structure definition.
Definition: txz_i2c.h:309
uint32_t intend
Definition: txz_i2c.h:314
#define I2CxST_I2C
Definition: txz_i2c.h:95
#define I2CxOP_RSTA
Definition: txz_i2c.h:195
#define I2CxCR2_SWRES_10
Definition: txz_i2c.h:133
void I2C_init(I2C_t *p_obj)
__STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj)
Interrupt Status.
Definition: txz_i2c.h:652
#define I2CxSR_AAS
Definition: txz_i2c.h:153
__STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj)
Return The Transmitter.
Definition: txz_i2c.h:630
__STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj)
Return restart condition.
Definition: txz_i2c.h:503
Clock setting structure definition.
Definition: txz_i2c.h:298
#define I2CxCR2_SWRES_01
Definition: txz_i2c.h:134
__STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj)
Read from Data buffer.
Definition: txz_i2c.h:460
I2C_clock_setting_t clock
Definition: txz_i2c.h:324
__STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj)
Return received Ack condition.
Definition: txz_i2c.h:564
__STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx)
Enable Interrupt setting.
Definition: txz_i2c.h:714
#define I2CxAR_ALS
Definition: txz_i2c.h:214
__STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj)
Disable Interrupt setting.
Definition: txz_i2c.h:748
__STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr)
Set slave address.
Definition: txz_i2c.h:769
uint32_t sck
Definition: txz_i2c.h:300
__STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj)
Return Busy condition.
Definition: txz_i2c.h:586
uint32_t ack
Definition: txz_i2c.h:312
__STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj)
Interrupt Status Clear.
Definition: txz_i2c.h:673
#define I2CxIE_DMARI2CTX
Definition: txz_i2c.h:176
uint32_t reset
Definition: txz_i2c.h:313
#define I2CxCR2_STOP_CONDITION
Definition: txz_i2c.h:136
void I2C_start_condition(I2C_t *p_obj, uint32_t data)
__STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj)
I2C bus port high.
Definition: txz_i2c.h:419
#define I2CxSR_BB
Definition: txz_i2c.h:150
All common macro and definition for TXZ peripheral drivers.
__STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj)
Detecting Slave Address.
Definition: txz_i2c.h:791
uint32_t I2C_get_clock_setting(I2C_t *p_obj, uint32_t frequency, uint32_t fsys, I2C_clock_setting_t *p_setting)
__STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data)
Write to Data buffer.
Definition: txz_i2c.h:482
#define I2CxSR_LRB
Definition: txz_i2c.h:155
__STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack)
Set Ack condition.
Definition: txz_i2c.h:529
__STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj)
Enable Interrupt setting.
Definition: txz_i2c.h:693
__STATIC_INLINE int32_t I2C_master(I2C_t *p_obj)
Return The Master status.
Definition: txz_i2c.h:608
#define I2CxST_CLEAR
Definition: txz_i2c.h:96
#define I2CxAR2_INIT
Definition: txz_i2c.h:216
#define I2CxIE_CLEAR
Definition: txz_i2c.h:179
__STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj)
Generate stop condition.
Definition: txz_i2c.h:440
uint32_t prsck
Definition: txz_i2c.h:301
#define I2CxIE_DMARI2CRX
Definition: txz_i2c.h:177
#define I2CxOP_SAST
Definition: txz_i2c.h:193
__STATIC_INLINE void I2C_reset(I2C_t *p_obj)
I2C software reset.
Definition: txz_i2c.h:396
Initial setting structure definition.
Definition: txz_i2c.h:322
#define I2CxPM_SDA_SCL
Definition: txz_i2c.h:228
#define I2CxIE_I2C
Definition: txz_i2c.h:178
uint32_t sgcdi
Definition: txz_i2c.h:311
I2C handle structure definition.
Definition: txz_i2c.h:342
I2C_initial_setting_t init
Definition: txz_i2c.h:345
#define I2CxSR_MST
Definition: txz_i2c.h:148
Initial setting structure definition.
Definition: txz_i2c.h:332
I2CS_wup_setting_t wup
Definition: txz_i2c.h:334