35 #define KEYCODE (0xA74A9D23UL) 37 #define CODEF_BGN (0x5E000000UL) 38 #define CODEF_END (0x5E080000UL) 39 #define CODEF_IPRT_OFFSET (0x00002000UL) 40 #define ISEC_OFFSET (0x00001000UL) 41 #define CODEF_PG2_OFFSET (0x00002000UL) 42 #define CODEF_BLK1_OFFSET (0x00008000UL) 44 #define FLASH_SEQ_1ST (0x00000550UL) 45 #define FLASH_SEQ_2ND (0x00000AA0UL) 47 #define FLASH_CMD_AA 0xAA 48 #define FLASH_CMD_55 0x55 49 #define FLASH_CMD_80 0x80 51 #define FLASH_CMD_60 0x60 52 #define FLASH_CMD_40 0x40 53 #define FLASH_CMD_30 0x30 55 #define ISEC_MASK (0x00000000UL) 56 #define ISEC_RELEASE (0x00000001UL) ISP_BOOT Flash_Write(PG2-PG7,Block1-Block15) Sample Application.
CMSIS Cortex-M4 Core Peripheral Access Layer Header File for the TOSHIBA 'TMPM4Gx' Group...
CMSIS Cortex-M4 Device Peripheral Access Layer Header File for the TOSHIBA 'TMPM4Gx' Device Series...
This file provides all the functions prototypes for T32A driver.
This file provides all the functions prototypes for UART driver.