TMPM4G9  V1.0.0.0

ADC. More...

#include <TMPM4G6.h>

Data Fields

__IO uint32_t CR0
 
__IO uint32_t CR1
 
__I uint32_t ST
 
__IO uint32_t CLK
 
__IO uint32_t MOD0
 
__IO uint32_t MOD1
 
__IO uint32_t MOD2
 
uint32_t RESERVED0
 
__IO uint32_t CMPEN
 
__IO uint32_t CMPCR0
 
__IO uint32_t CMPCR1
 
__IO uint32_t CMP0
 
__IO uint32_t CMP1
 
__IO uint32_t CMPCR2
 
__IO uint32_t CMPCR3
 
__IO uint32_t CMP2
 
__IO uint32_t CMP3
 
uint32_t RESERVED1 [30]
 
__IO uint32_t EXAZSEL
 
__IO uint32_t TSET0
 
__IO uint32_t TSET1
 
__IO uint32_t TSET2
 
__IO uint32_t TSET3
 
__IO uint32_t TSET4
 
__IO uint32_t TSET5
 
__IO uint32_t TSET6
 
__IO uint32_t TSET7
 
__IO uint32_t TSET8
 
__IO uint32_t TSET9
 
__IO uint32_t TSET10
 
__IO uint32_t TSET11
 
__IO uint32_t TSET12
 
__IO uint32_t TSET13
 
__IO uint32_t TSET14
 
__IO uint32_t TSET15
 
__IO uint32_t TSET16
 
__IO uint32_t TSET17
 
__IO uint32_t TSET18
 
__IO uint32_t TSET19
 
__IO uint32_t TSET20
 
__IO uint32_t TSET21
 
__IO uint32_t TSET22
 
__IO uint32_t TSET23
 
uint32_t RESERVED2 [8]
 
__I uint32_t REG0
 
__I uint32_t REG1
 
__I uint32_t REG2
 
__I uint32_t REG3
 
__I uint32_t REG4
 
__I uint32_t REG5
 
__I uint32_t REG6
 
__I uint32_t REG7
 
__I uint32_t REG8
 
__I uint32_t REG9
 
__I uint32_t REG10
 
__I uint32_t REG11
 
__I uint32_t REG12
 
__I uint32_t REG13
 
__I uint32_t REG14
 
__I uint32_t REG15
 
__I uint32_t REG16
 
__I uint32_t REG17
 
__I uint32_t REG18
 
__I uint32_t REG19
 
__I uint32_t REG20
 
__I uint32_t REG21
 
__I uint32_t REG22
 
__I uint32_t REG23
 

Detailed Description

ADC.

Field Documentation

§ CLK

__IO uint32_t CLK

AD Conversion Clock Setting Register

§ CMP0

__IO uint32_t CMP0

AD Conversion Result Comparison Register 0

§ CMP1

__IO uint32_t CMP1

AD Conversion Result Comparison Register 1

§ CMP2

__IO uint32_t CMP2

AD Conversion Result Comparison Register 2

§ CMP3

__IO uint32_t CMP3

AD Conversion Result Comparison Register 3

§ CMPCR0

__IO uint32_t CMPCR0

AD Monitoring Setting Register 0

§ CMPCR1

__IO uint32_t CMPCR1

AD Monitoring Setting Register 1

§ CMPCR2

__IO uint32_t CMPCR2

AD Conversion Monitor Function setting Register 2

§ CMPCR3

__IO uint32_t CMPCR3

AD Conversion Monitor Function setting Register 3

§ CMPEN

__IO uint32_t CMPEN

AD Monitoring interrupt permission register

§ CR0

__IO uint32_t CR0

AD Control Register 0

§ CR1

__IO uint32_t CR1

AD Control Register 1

§ EXAZSEL

__IO uint32_t EXAZSEL

AIN sampling period selection register

§ MOD0

__IO uint32_t MOD0

AD Mode Control Register 0

§ MOD1

__IO uint32_t MOD1

AD Mode Control Register 1

§ MOD2

__IO uint32_t MOD2

AD Mode Control Register 2

§ REG0

__I uint32_t REG0

AD AD Conversion Result Register 0

§ REG1

__I uint32_t REG1

AD Conversion Result Register 1

§ REG10

__I uint32_t REG10

AD Conversion Result Register 10

§ REG11

__I uint32_t REG11

AD Conversion Result Register 11

§ REG12

__I uint32_t REG12

AD Conversion Result Register 12

§ REG13

__I uint32_t REG13

AD Conversion Result Register 13

§ REG14

__I uint32_t REG14

AD Conversion Result Register 14

§ REG15

__I uint32_t REG15

AD Conversion Result Register 15

§ REG16

__I uint32_t REG16

AD Conversion Result Register 16

§ REG17

__I uint32_t REG17

AD Conversion Result Register 17

§ REG18

__I uint32_t REG18

AD Conversion Result Register 18

§ REG19

__I uint32_t REG19

AD Conversion Result Register 19

§ REG2

__I uint32_t REG2

AD Conversion Result Register 2

§ REG20

__I uint32_t REG20

AD Conversion Result Register 20

§ REG21

__I uint32_t REG21

AD Conversion Result Register 21

§ REG22

__I uint32_t REG22

AD Conversion Result Register 22

§ REG23

__I uint32_t REG23

AD Conversion Result Register 23

§ REG3

__I uint32_t REG3

AD Conversion Result Register 3

§ REG4

__I uint32_t REG4

AD Conversion Result Register 4

§ REG5

__I uint32_t REG5

AD Conversion Result Register 5

§ REG6

__I uint32_t REG6

AD Conversion Result Register 6

§ REG7

__I uint32_t REG7

AD Conversion Result Register 7

§ REG8

__I uint32_t REG8

AD Conversion Result Register 8

§ REG9

__I uint32_t REG9

AD Conversion Result Register 9

§ RESERVED0

uint32_t RESERVED0

§ RESERVED1

uint32_t RESERVED1

§ RESERVED2

uint32_t RESERVED2

§ ST

__I uint32_t ST

AD Status Register

§ TSET0

__IO uint32_t TSET0

AD General purpose Trigger Program Register 0

§ TSET1

__IO uint32_t TSET1

AD General purpose Trigger Program Register 1

§ TSET10

__IO uint32_t TSET10

AD General purpose Trigger Program Register 10

§ TSET11

__IO uint32_t TSET11

AD General purpose Trigger Program Register 11

§ TSET12

__IO uint32_t TSET12

AD General purpose Trigger Program Register 12

§ TSET13

__IO uint32_t TSET13

AD General purpose Trigger Program Register 13

§ TSET14

__IO uint32_t TSET14

AD General purpose Trigger Program Register 14

§ TSET15

__IO uint32_t TSET15

AD General purpose Trigger Program Register 15

§ TSET16

__IO uint32_t TSET16

AD General purpose Trigger Program Register 16

§ TSET17

__IO uint32_t TSET17

AD General purpose Trigger Program Register 17

§ TSET18

__IO uint32_t TSET18

AD General purpose Trigger Program Register 18

§ TSET19

__IO uint32_t TSET19

AD General purpose Trigger Program Register 19

§ TSET2

__IO uint32_t TSET2

AD General purpose Trigger Program Register 2

§ TSET20

__IO uint32_t TSET20

AD General purpose Trigger Program Register 20

§ TSET21

__IO uint32_t TSET21

AD General purpose Trigger Program Register 21

§ TSET22

__IO uint32_t TSET22

AD General purpose Trigger Program Register 22

§ TSET23

__IO uint32_t TSET23

AD General purpose Trigger Program Register 23

§ TSET3

__IO uint32_t TSET3

AD General purpose Trigger Program Register 3

§ TSET4

__IO uint32_t TSET4

AD General purpose Trigger Program Register 4

§ TSET5

__IO uint32_t TSET5

AD General purpose Trigger Program Register 5

§ TSET6

__IO uint32_t TSET6

AD General purpose Trigger Program Register 6

§ TSET7

__IO uint32_t TSET7

AD General purpose Trigger Program Register 7

§ TSET8

__IO uint32_t TSET8

AD General purpose Trigger Program Register 8

§ TSET9

__IO uint32_t TSET9

AD General purpose Trigger Program Register 9


The documentation for this struct was generated from the following files: