TMPM4G(1) Group Peripheral Driver User Manual
V1.0.0.0
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ADxCR1 Register. More...
Macros | |
#define | ADxCR1_HPDMEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_HPDMEN_ENABLE ((uint32_t)0x00000080) |
#define | ADxCR1_CNTDMEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_CNTDMEN_ENABLE ((uint32_t)0x00000040) |
#define | ADxCR1_SGLDMEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_SGLDMEN_ENABLE ((uint32_t)0x00000020) |
#define | ADxCR1_TRGDMEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_TRGDMEN_ENABLE ((uint32_t)0x00000010) |
#define | ADxCR1_HPTRGEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_HPTRGEN_ENABLE ((uint32_t)0x00000002) |
#define | ADxCR1_TRGEN_DISABLE ((uint32_t)0x00000000) |
#define | ADxCR1_TRGEN_ENABLE ((uint32_t)0x00000001) |
ADxCR1 Register.
Detail.
Bit | Bit Symbol |
---|---|
31-8 | - |
7 | HPDMEN |
6 | CNTDMEN |
5 | SGLDMEN |
4 | TRGDMEN |
3:2 | - |
1 | HPTRGEN |
0 | TRGEN |
#define ADxCR1_CNTDMEN_DISABLE ((uint32_t)0x00000000) |
CNTDMEN :Disable
#define ADxCR1_CNTDMEN_ENABLE ((uint32_t)0x00000040) |
CNTDMEN :Enable
#define ADxCR1_HPDMEN_DISABLE ((uint32_t)0x00000000) |
HPDMEN :Disable
#define ADxCR1_HPDMEN_ENABLE ((uint32_t)0x00000080) |
HPDMEN :Enable
#define ADxCR1_HPTRGEN_DISABLE ((uint32_t)0x00000000) |
HPTRGEN :Disable
#define ADxCR1_HPTRGEN_ENABLE ((uint32_t)0x00000002) |
HPTRGEN :Enable
#define ADxCR1_SGLDMEN_DISABLE ((uint32_t)0x00000000) |
SGLDMEN :Disable
#define ADxCR1_SGLDMEN_ENABLE ((uint32_t)0x00000020) |
SGLDMEN :Enable
#define ADxCR1_TRGDMEN_DISABLE ((uint32_t)0x00000000) |
TRGDMEN :Disable
#define ADxCR1_TRGDMEN_ENABLE ((uint32_t)0x00000010) |
TRGDMEN :Enable
#define ADxCR1_TRGEN_DISABLE ((uint32_t)0x00000000) |
TRGEN :Disable
#define ADxCR1_TRGEN_ENABLE ((uint32_t)0x00000001) |
TRGEN :Enable