TMPM4G(1) Group Peripheral Driver User Manual
V1.0.0.0
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HDMAxEnbldChns Register Definition. More...
Macros | |
#define | EnabledCH1_TX_CMP ((uint32_t)0x00000000) |
#define | EnabledCH1_TX_RUN ((uint32_t)0x00000002) |
#define | EnabledCH0_TX_CMP ((uint32_t)0x00000000) |
#define | EnabledCH0_TX_RUN ((uint32_t)0x00000001) |
#define | EnabledALL_TX_RUN ((uint32_t)0x00000003) |
HDMAxEnbldChns Register Definition.
Detail.
Bit | Bit Symbol |
---|---|
31-2 | - |
1 | IntTCStatus1 |
0 | IntTCStatus0 |
#define EnabledALL_TX_RUN ((uint32_t)0x00000003) |
Ch0/ch1 TX Enable Status.
#define EnabledCH0_TX_CMP ((uint32_t)0x00000000) |
Ch0 TX Complete.
#define EnabledCH0_TX_RUN ((uint32_t)0x00000001) |
Ch0 TX Enable Status.
#define EnabledCH1_TX_CMP ((uint32_t)0x00000000) |
Ch1 TX Complete.
#define EnabledCH1_TX_RUN ((uint32_t)0x00000002) |
Ch1 TX Enable Status.