TMPM4G(1) Group Peripheral Driver User Manual
V1.0.0.0
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UARTxCR0 Register Definition. More...
Macros | |
#define | UARTxCR0_HBSST_MASK ((uint32_t)0x00040000) |
#define | UARTxCR0_HBSMD_MASK ((uint32_t)0x00020000) |
#define | UARTxCR0_HBSEN_MASK ((uint32_t)0x00010000) |
#define | UARTxCR0_HBSEN_DISABLE ((uint32_t)0x00000000) |
#define | UARTxCR0_HBSEN_ENABLE ((uint32_t)0x00010000) |
#define | UARTxCR0_LPB_MASK ((uint32_t)0x00008000) |
#define | UARTxCR0_LPB_DISABLE ((uint32_t)0x00000000) |
#define | UARTxCR0_LPB_ENABLE ((uint32_t)0x00008000) |
#define | UARTxCR0_WU_MASK ((uint32_t)0x00000100) |
#define | UARTxCR0_WU_DISABLE ((uint32_t)0x00000000) |
#define | UARTxCR0_WU_ENABLE ((uint32_t)0x00000100) |
UARTxCR0 Register Definition.
Detail.
Bit | Bit Symbol |
---|---|
31-19 | - |
18 | HBSST |
17 | HBSMD |
16 | HBSEN |
15 | LPB |
14-12 | NF[2:0] |
11 | - |
10 | CTSE |
9 | RTSE |
8 | WU |
7 | - |
6 | IV |
5 | DIR |
4 | SBLEN |
3 | EVEN |
2 | PE |
1-0 | SM[1:0] |
#define UARTxCR0_HBSEN_DISABLE ((uint32_t)0x00000000) |
HBSEN :Disable.
#define UARTxCR0_HBSEN_ENABLE ((uint32_t)0x00010000) |
HBSEN :Enable.
#define UARTxCR0_HBSEN_MASK ((uint32_t)0x00010000) |
HBSEN :Mask.
#define UARTxCR0_HBSMD_MASK ((uint32_t)0x00020000) |
HBSMD :Mask.
#define UARTxCR0_HBSST_MASK ((uint32_t)0x00040000) |
HBSST :Mask.
#define UARTxCR0_LPB_DISABLE ((uint32_t)0x00000000) |
LPB :Disable.
#define UARTxCR0_LPB_ENABLE ((uint32_t)0x00008000) |
LPB :Enable.
#define UARTxCR0_LPB_MASK ((uint32_t)0x00008000) |
LPB :Mask.
#define UARTxCR0_WU_DISABLE ((uint32_t)0x00000000) |
WU :Disable.
#define UARTxCR0_WU_ENABLE ((uint32_t)0x00000100) |
WU :Enable.
#define UARTxCR0_WU_MASK ((uint32_t)0x00000100) |
WU :Mask.