TMPM4G9
V1.0.0.0
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Macros | |
#define | FUART_IO_NULL ((void *)0) |
#define | FUART_IO_NULL ((void *)0) |
#define | LED_NULL ((void *)0) |
#define | SW_NULL ((void *)0) |
#define | UART_IO_NULL ((void *)0) |
#define | UART_IO_NULL ((void *)0) |
#define | UART_IO_NULL ((void *)0) |
Functions | |
adc_mod1_t | adc_get_mode1 (adc_t *p_adc) |
ADxCLK Macro Definition. | |
ADxCLK Register Macro Definition. Detail. | Bit | Bit Symbol | | 31:12 | :— | | 11:8 | EXAZ1 | | 7 | - | | 6:3 | EXAZ0 | | 2:0 | VACLK | | |
#define | ADC_ADCLK_1_DIV ((uint32_t)0x00000001) /*'< ADC SCLK ADCLK division value */ |
#define | ADC_ADCLK_2_DIV ((uint32_t)0x00000002) /*'< ADC SCLK ADCLK/2 division value */ |
#define | ADC_ADCLK_4_DIV ((uint32_t)0x00000004) /*'< ADC SCLK ADCLK/4 division value */ |
#define | ADC_ADCLK_8_DIV ((uint32_t)0x00000008) /*'< ADC SCLK ADCLK/8 division value */ |
#define | ADC_ADCLK_16_DIV ((uint32_t)0x00000010) /*'< ADC SCLK ADCLK/16 division value */ |
RTC_NULL Pointer | |
#define | RTC_NULL ((void *)0) |
Parameter Result | |
#define | RTC_PARAM_OK ((int32_t)1) |
#define | RTC_PARAM_NG ((int32_t)0) |
RTCHOURR Macro Definition. | |||||||
RTCHOURR Register Macro Definition. Detail.
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#define | RTCPAGER_HO_12_HOUR_MASK ((uint8_t)0x1F) | ||||||
#define | RTCPAGER_HO_12_MERIDIEM_MASK ((uint8_t)0x20) | ||||||
#define | RTCPAGER_HO_12_MERIDIEM_AM ((uint8_t)0x00) | ||||||
#define | RTCPAGER_HO_12_MERIDIEM_PM ((uint8_t)0x20) | ||||||
RTCPAGER Macro Definition. | |||||||||||||||||
RTCPAGER Register Macro Definition. Detail.
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#define | RTCPAGER_INTENA_MASK ((uint8_t)0x80) | ||||||||||||||||
#define | RTCPAGER_INTENA_DISABLE ((uint8_t)0x00) | ||||||||||||||||
#define | RTCPAGER_INTENA_ENABLE ((uint8_t)0x80) | ||||||||||||||||
#define | RTCPAGER_ADJUST_W_REQ ((uint8_t)0x10) | ||||||||||||||||
#define | RTCPAGER_ADJUST_R_IDLE ((uint8_t)0x00) | ||||||||||||||||
#define | RTCPAGER_ADJUST_R_RUN ((uint8_t)0x10) | ||||||||||||||||
#define | RTCPAGER_ENATMR_MASK ((uint8_t)0x08) | ||||||||||||||||
#define | RTCPAGER_ENATMR_DISABLE ((uint8_t)0x00) | ||||||||||||||||
#define | RTCPAGER_ENATMR_ENABLE ((uint8_t)0x08) | ||||||||||||||||
#define | RTCPAGER_ENAALM_MASK ((uint8_t)0x04) | ||||||||||||||||
#define | RTCPAGER_ENAALM_DISABLE ((uint8_t)0x00) | ||||||||||||||||
#define | RTCPAGER_ENAALM_ENABLE ((uint8_t)0x04) | ||||||||||||||||
#define | RTCPAGER_PAGE_MASK ((uint8_t)0x01) | ||||||||||||||||
#define | RTCPAGER_PAGE_0 ((uint8_t)0x00) | ||||||||||||||||
#define | RTCPAGER_PAGE_1 ((uint8_t)0x01) | ||||||||||||||||
RTCRESTR Macro Definition. | |||||||||||||||||||
RTCRESTR Register Macro Definition. Detail.
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#define | RTCRESTR_RSTTMR_MASK ((uint8_t)0x20) | ||||||||||||||||||
#define | RTCRESTR_RSTTMR_W_RESET ((uint8_t)0x20) | ||||||||||||||||||
#define | RTCRESTR_RSTTMR_R_IDLE ((uint8_t)0x00) | ||||||||||||||||||
#define | RTCRESTR_RSTTMR_R_RUN ((uint8_t)0x20) | ||||||||||||||||||
#define | RTCRESTR_RSTALM_MASK ((uint8_t)0x10) | ||||||||||||||||||
#define | RTCRESTR_RSTALM_RESET ((uint8_t)0x10) | ||||||||||||||||||
#define ADC_ADCLK_16_DIV ((uint32_t)0x00000010) /*'< ADC SCLK ADCLK/16 division value */ |
#define ADC_ADCLK_1_DIV ((uint32_t)0x00000001) /*'< ADC SCLK ADCLK division value */ |
#define ADC_ADCLK_2_DIV ((uint32_t)0x00000002) /*'< ADC SCLK ADCLK/2 division value */ |
#define ADC_ADCLK_4_DIV ((uint32_t)0x00000004) /*'< ADC SCLK ADCLK/4 division value */ |
#define ADC_ADCLK_8_DIV ((uint32_t)0x00000008) /*'< ADC SCLK ADCLK/8 division value */ |
#define FUART_IO_NULL ((void *)0) |
Null Pointer
#define FUART_IO_NULL ((void *)0) |
Null Pointer
#define LED_NULL ((void *)0) |
Null Pointer
#define RTC_NULL ((void *)0) |
#define RTC_PARAM_NG ((int32_t)0) |
Parameter is invalid(not specified).
#define RTC_PARAM_OK ((int32_t)1) |
Parameter is valid(specified).
#define RTCPAGER_ADJUST_R_IDLE ((uint8_t)0x00) |
ADJUST :[read] Idle(No request).
#define RTCPAGER_ADJUST_R_RUN ((uint8_t)0x10) |
ADJUST :[read] Running(Processing Request).
#define RTCPAGER_ADJUST_W_REQ ((uint8_t)0x10) |
ADJUST :[write] Request.
#define RTCPAGER_ENAALM_DISABLE ((uint8_t)0x00) |
ENAALM :Disable.
#define RTCPAGER_ENAALM_ENABLE ((uint8_t)0x04) |
ENAALM :Enable.
#define RTCPAGER_ENAALM_MASK ((uint8_t)0x04) |
ENAALM :Mask.
#define RTCPAGER_ENATMR_DISABLE ((uint8_t)0x00) |
ENATMR :Disable.
#define RTCPAGER_ENATMR_ENABLE ((uint8_t)0x08) |
ENATMR :Enable.
#define RTCPAGER_ENATMR_MASK ((uint8_t)0x08) |
ENATMR :Mask.
#define RTCPAGER_HO_12_HOUR_MASK ((uint8_t)0x1F) |
HO :When 12-hour notaion, hour value mask.
#define RTCPAGER_HO_12_MERIDIEM_AM ((uint8_t)0x00) |
HO :When 12-hour notaion, A.M.
#define RTCPAGER_HO_12_MERIDIEM_MASK ((uint8_t)0x20) |
HO :When 12-hour notaion, meridiem value mask.
#define RTCPAGER_HO_12_MERIDIEM_PM ((uint8_t)0x20) |
HO :When 12-hour notaion, P.M.
#define RTCPAGER_INTENA_DISABLE ((uint8_t)0x00) |
INTENA :Disable.
#define RTCPAGER_INTENA_ENABLE ((uint8_t)0x80) |
INTENA :Enable.
#define RTCPAGER_INTENA_MASK ((uint8_t)0x80) |
INTENA :Mask.
#define RTCPAGER_PAGE_0 ((uint8_t)0x00) |
PAGE :Select Page0.
#define RTCPAGER_PAGE_1 ((uint8_t)0x01) |
PAGE :Select Page1.
#define RTCPAGER_PAGE_MASK ((uint8_t)0x01) |
PAGE :Mask.
#define RTCRESTR_RSTALM_MASK ((uint8_t)0x10) |
RSTALM :Mask.
#define RTCRESTR_RSTALM_RESET ((uint8_t)0x10) |
RSTALM :Reset request.
#define RTCRESTR_RSTTMR_MASK ((uint8_t)0x20) |
RSTTMR :Mask.
#define RTCRESTR_RSTTMR_R_IDLE ((uint8_t)0x00) |
RSTTMR :[read] Idle(No request).
#define RTCRESTR_RSTTMR_R_RUN ((uint8_t)0x20) |
RSTTMR :[read] Running(Processing Request).
#define RTCRESTR_RSTTMR_W_RESET ((uint8_t)0x20) |
RSTTMR :[read] Reset request.
#define SW_NULL ((void *)0) |
Null Pointer
#define UART_IO_NULL ((void *)0) |
Null Pointer
#define UART_IO_NULL ((void *)0) |
Null Pointer
#define UART_IO_NULL ((void *)0) |
Null Pointer
adc_mod1_t adc_get_mode1 | ( | adc_t * | p_adc | ) |