TMPM4G(1) Group Peripheral Driver User Manual  V1.0.0.0
txz_uart_include.h
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1 
13 /*------------------------------------------------------------------------------*/
14 /* Define to prevent recursive inclusion */
15 /*------------------------------------------------------------------------------*/
16 #ifndef __UART_INCLUDE_H
17 #define __UART_INCLUDE_H
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 /*------------------------------------------------------------------------------*/
24 /* Includes */
25 /*------------------------------------------------------------------------------*/
26 #include "txz_driver_def.h"
27 
37 /*------------------------------------------------------------------------------*/
38 /* Macro Definition */
39 /*------------------------------------------------------------------------------*/
50 #define UART_NULL ((void *)0)
51  /* End of group UART_NullPointer */
54 
60 #define UART_PARAM_OK ((int32_t)1)
61 #define UART_PARAM_NG ((int32_t)0) /* End of group UART_ParameterResult */
65 
78 /* SWRSTF */
79 #define UARTxSWRST_SWRSTF_MASK ((uint32_t)0x00000080)
80 #define UARTxSWRST_SWRSTF_IDLE ((uint32_t)0x00000000)
81 #define UARTxSWRST_SWRSTF_RUN ((uint32_t)0x00000080)
82 /* SWRST */
83 #define UARTxSWRST_SWRST_10 ((uint32_t)0x00000002)
84 #define UARTxSWRST_SWRST_01 ((uint32_t)0x00000001) /* End of group UARTxSWRST */
88 
114 /* HBSST */
115 #define UARTxCR0_HBSST_MASK ((uint32_t)0x00040000)
116 /* HBSMD */
117 #define UARTxCR0_HBSMD_MASK ((uint32_t)0x00020000)
118 /* HBSEN */
119 #define UARTxCR0_HBSEN_MASK ((uint32_t)0x00010000)
120 #define UARTxCR0_HBSEN_DISABLE ((uint32_t)0x00000000)
121 #define UARTxCR0_HBSEN_ENABLE ((uint32_t)0x00010000)
122 /* LPB */
123 #define UARTxCR0_LPB_MASK ((uint32_t)0x00008000)
124 #define UARTxCR0_LPB_DISABLE ((uint32_t)0x00000000)
125 #define UARTxCR0_LPB_ENABLE ((uint32_t)0x00008000)
126 /* WU */
127 #define UARTxCR0_WU_MASK ((uint32_t)0x00000100)
128 #define UARTxCR0_WU_DISABLE ((uint32_t)0x00000000)
129 #define UARTxCR0_WU_ENABLE ((uint32_t)0x00000100) /* End of group UARTxCR0 */
133 
154 /* RIL */
155 #define UARTxCR1_RIL_MASK ((uint32_t)0x00000700)
156 /* DMATE */
157 #define UARTxCR1_DMATE_MASK ((uint32_t)0x00000002)
158 #define UARTxCR1_DMATE_DISABLE ((uint32_t)0x00000000)
159 #define UARTxCR1_DMATE_ENABLE ((uint32_t)0x00000002)
160 /* DMARE */
161 #define UARTxCR1_DMARE_MASK ((uint32_t)0x00000001)
162 #define UARTxCR1_DMARE_DISABLE ((uint32_t)0x00000000)
163 #define UARTxCR1_DMARE_ENABLE ((uint32_t)0x00000001) /* End of group UARTxCR1 */
167 
181 /* BK */
182 #define UARTxTRANS_BK_MASK ((uint32_t)0x00000008)
183 #define UARTxTRANS_BK_STOP ((uint32_t)0x00000000)
184 #define UARTxTRANS_BK_SEND ((uint32_t)0x00000008)
185 /* TXTRG */
186 #define UARTxTRANS_TXTRG_MASK ((uint32_t)0x00000004)
187 #define UARTxTRANS_TXTRG_DISABLE ((uint32_t)0x00000000)
188 #define UARTxTRANS_TXTRG_ENABLE ((uint32_t)0x00000004)
189 /* TXE */
190 #define UARTxTRANS_TXE_MASK ((uint32_t)0x00000002)
191 #define UARTxTRANS_TXE_DISABLE ((uint32_t)0x00000000)
192 #define UARTxTRANS_TXE_ENABLE ((uint32_t)0x00000002)
193 /* RXE */
194 #define UARTxTRANS_RXE_MASK ((uint32_t)0x00000001)
195 #define UARTxTRANS_RXE_DISABLE ((uint32_t)0x00000000)
196 #define UARTxTRANS_RXE_ENABLE ((uint32_t)0x00000001)
197 /* TXE,RXE */
198 #define UARTxTRANS_TXE_RXE_MASK ((uint32_t)0x00000003) /* End of group UARTxTRANS */
202 
217 /* DR */
218 #define UARTxDR_DR_9BIT_MASK ((uint32_t)0x000001FF)
219 #define UARTxDR_DR_8BIT_MASK ((uint32_t)0x000000FF)
220 #define UARTxDR_DR_7BIT_MASK ((uint32_t)0x0000007F) /* End of group UARTxDR */
224 
245 /* SUE */
246 #define UARTxSR_SUE_MASK ((uint32_t)0x80000000)
247 /* TXEND */
248 #define UARTxSR_TXEND_MASK ((uint32_t)0x00004000)
249 #define UARTxSR_TXEND_R_END ((uint32_t)0x00004000)
250 #define UARTxSR_TXEND_W_CLEAR ((uint32_t)0x00004000)
251 /* TXFF */
252 #define UARTxSR_TXFF_MASK ((uint32_t)0x00002000)
253 #define UARTxSR_TXFF_R_REACHED ((uint32_t)0x00002000)
254 #define UARTxSR_TXFF_W_CLEAR ((uint32_t)0x00002000)
255 /* TLVL */
256 #define UARTxSR_TLVL_MASK ((uint32_t)0x00000F00)
257 /* RXEND */
258 #define UARTxSR_RXEND_MASK ((uint32_t)0x00000040)
259 #define UARTxSR_RXEND_R_END ((uint32_t)0x00000040)
260 #define UARTxSR_RXEND_W_CLEAR ((uint32_t)0x00000040)
261 /* RXFF */
262 #define UARTxSR_RXFF_MASK ((uint32_t)0x00000020)
263 #define UARTxSR_RXFF_R_REACHED ((uint32_t)0x00000020)
264 #define UARTxSR_RXFF_W_CLEAR ((uint32_t)0x00000020)
265 /* RLVL */
266 #define UARTxSR_RLVL_MASK ((uint32_t)0x0000000F) /* End of group UARTxSR */
270 
282 /* TFCLR */
283 #define UARTxFIFOCLR_TFCLR_CLEAR ((uint32_t)0x00000002)
284 /* RFCLR */
285 #define UARTxFIFOCLR_RFCLR_CLEAR ((uint32_t)0x00000001) /* End of group UARTxFIFOCLR */
289 
304 /* TRGERR */
305 #define UARTxERR_TRGERR_MASK ((uint32_t)0x00000010)
306 #define UARTxERR_TRGERR_R_NO_ERR ((uint32_t)0x00000000)
307 #define UARTxERR_TRGERR_R_ERR ((uint32_t)0x00000010)
308 #define UARTxERR_TRGERR_W_CLEAR ((uint32_t)0x00000010)
309 /* OVRERR */
310 #define UARTxERR_OVRERR_MASK ((uint32_t)0x00000008)
311 #define UARTxERR_OVRERR_R_NO_ERR ((uint32_t)0x00000000)
312 #define UARTxERR_OVRERR_R_ERR ((uint32_t)0x00000008)
313 #define UARTxERR_OVRERR_W_CLEAR ((uint32_t)0x00000008)
314 /* PERR */
315 #define UARTxERR_PERR_MASK ((uint32_t)0x00000004)
316 #define UARTxERR_PERR_R_NO_ERR ((uint32_t)0x00000000)
317 #define UARTxERR_PERR_R_ERR ((uint32_t)0x00000004)
318 #define UARTxERR_PERR_W_CLEAR ((uint32_t)0x00000004)
319 /* FERR */
320 #define UARTxERR_FERR_MASK ((uint32_t)0x00000002)
321 #define UARTxERR_FERR_R_NO_ERR ((uint32_t)0x00000000)
322 #define UARTxERR_FERR_R_ERR ((uint32_t)0x00000002)
323 #define UARTxERR_FERR_W_CLEAR ((uint32_t)0x00000002)
324 /* BERR */
325 #define UARTxERR_BERR_MASK ((uint32_t)0x00000001)
326 #define UARTxERR_BERR_R_NO_ERR ((uint32_t)0x00000000)
327 #define UARTxERR_BERR_R_ERR ((uint32_t)0x00000001)
328 #define UARTxERR_BERR_W_CLEAR ((uint32_t)0x00000001) /* End of group UARTxERR */
332  /* End of group UART_Private_define */
336 
337 
338 /*------------------------------------------------------------------------------*/
339 /* Enumerated Type Definition */
340 /*------------------------------------------------------------------------------*/
346 /* no define */
347  /* End of group UART_Private_define */
351 
352 
353 /*------------------------------------------------------------------------------*/
354 /* Structure Definition */
355 /*------------------------------------------------------------------------------*/
361 /* no define */
362  /* End of group UART_Private_typedef */
366 
367 /*------------------------------------------------------------------------------*/
368 /* Inline Functions */
369 /*------------------------------------------------------------------------------*/
374 __STATIC_INLINE void disable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance);
375 __STATIC_INLINE void enable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance);
376 __STATIC_INLINE void disable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance);
377 __STATIC_INLINE void enable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance);
378 /*--------------------------------------------------*/
385 /*--------------------------------------------------*/
386 __STATIC_INLINE void disable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
387 {
388 #ifdef DEBUG
389  if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
390  {
391  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 0;
392  }
393 #else
394  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 0;
395 #endif
396 }
397 
398 /*--------------------------------------------------*/
405 /*--------------------------------------------------*/
406 __STATIC_INLINE void enable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
407 {
408 #ifdef DEBUG
409  if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
410  {
411  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 1;
412  }
413 #else
414  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 1;
415 #endif
416 }
417 
418 /*--------------------------------------------------*/
425 /*--------------------------------------------------*/
426 __STATIC_INLINE void disable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
427 {
428 #ifdef DEBUG
429  if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
430  {
431  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 0;
432  }
433 #else
434  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 0;
435 #endif
436 }
437 
438 /*--------------------------------------------------*/
445 /*--------------------------------------------------*/
446 __STATIC_INLINE void enable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
447 {
448 #ifdef DEBUG
449  if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
450  {
451  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 1;
452  }
453 #else
454  (*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 1;
455 #endif
456 }
457 
458  /* End of group UART_Private_functions */
462  /* End of group UART */
466  /* End of group Periph_Driver */
470 
471 #ifdef __cplusplus
472 }
473 #endif /* __cplusplus */
474 #endif /* __UART_EX_H */
475 
476 
__STATIC_INLINE void enable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
Enable UARTxTRANS TXE.
Definition: txz_uart_include.h:406
All common macro and definition for TXZ peripheral drivers.
__STATIC_INLINE void disable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
Disable UARTxTRANS TXE.
Definition: txz_uart_include.h:386
__STATIC_INLINE void enable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
Enable UARTxTRANS RXE.
Definition: txz_uart_include.h:446
__STATIC_INLINE void disable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
Disable UARTxTRANS RXE.
Definition: txz_uart_include.h:426