16 #ifndef __ADC_INCLUDE_H 17 #define __ADC_INCLUDE_H 52 #define ADC_NULL ((void *)0) 62 #define ADC_PARAM_OK ((int32_t)1) 63 #define ADC_PARAM_NG ((int32_t)0) 82 #define ADxCR0_ADEN_MASK ((uint32_t)0x00000080) 83 #define ADxCR0_ADEN_DISABLE ((uint32_t)0x00000000) 84 #define ADxCR0_ADEN_ENABLE ((uint32_t)0x00000080) 86 #define ADxCR0_SGL_MASK ((uint32_t)0x00000002) 87 #define ADxCR0_SGL_ENABLE ((uint32_t)0x00000002) 89 #define ADxCR0_CNT_MASK ((uint32_t)0x00000001) 90 #define ADxCR0_CNT_DISABLE ((uint32_t)0x00000000) 91 #define ADxCR0_CNT_ENABLE ((uint32_t)0x00000001) 111 #define ADxCR1_CNTDMEN_MASK ((uint32_t)0x00000040) 112 #define ADxCR1_CNTDMEN_DISABLE ((uint32_t)0x00000000) 113 #define ADxCR1_CNTDMEN_ENABLE ((uint32_t)0x00000040) 115 #define ADxCR1_SGLDMEN_MASK ((uint32_t)0x00000020) 116 #define ADxCR1_SGLDMEN_DISABLE ((uint32_t)0x00000000) 117 #define ADxCR1_SGLDMEN_ENABLE ((uint32_t)0x00000020) 119 #define ADxCR1_TRGDMEN_MASK ((uint32_t)0x00000010) 120 #define ADxCR1_TRGDMEN_DISABLE ((uint32_t)0x00000000) 121 #define ADxCR1_TRGDMEN_ENABLE ((uint32_t)0x00000010) 123 #define ADxCR1_TRGEN_MASK ((uint32_t)0x00000001) 124 #define ADxCR1_TRGEN_DISABLE ((uint32_t)0x00000000) 125 #define ADxCR1_TRGEN_ENABLE ((uint32_t)0x00000001) 146 #define ADxST_ADBF_MASK ((uint32_t)0x00000080) 147 #define ADxST_ADBF_IDLE ((uint32_t)0x00000000) 148 #define ADxST_ADBF_RUN ((uint32_t)0x00000080) 150 #define ADxST_CNTF_MASK ((uint32_t)0x00000008) 151 #define ADxST_CNTF_IDLE ((uint32_t)0x00000000) 152 #define ADxST_CNTF_RUN ((uint32_t)0x00000008) 154 #define ADxST_SNGF_MASK ((uint32_t)0x00000004) 155 #define ADxST_SNGF_IDLE ((uint32_t)0x00000000) 156 #define ADxST_SNGF_RUN ((uint32_t)0x00000004) 158 #define ADxST_TRGF_MASK ((uint32_t)0x00000002) 159 #define ADxST_TRGF_IDLE ((uint32_t)0x00000000) 160 #define ADxST_TRGF_RUN ((uint32_t)0x00000002) 162 #define ADxST_PMDF_MASK ((uint32_t)0x00000001) 163 #define ADxST_PMDF_IDLE ((uint32_t)0x00000000) 164 #define ADxST_PMDF_RUN ((uint32_t)0x00000001) 181 #define ADxCLK_EXAZ_MASK ((uint32_t)0x00000078) 182 #define ADxCLK_EXAZ_1 ((uint32_t)0x00000000) 184 #define ADxCLK_VADCLK_MASK ((uint32_t)0x00000007) 185 #define ADxCLK_VADCLK_1 ((uint32_t)0x00000000) 186 #define ADxCLK_VADCLK_4 ((uint32_t)0x00000002) 205 #define ADxMOD0_AZFSH_MASK ((uint32_t)0x00000008) 206 #define ADxMOD0_AZFSH_NOMAL ((uint32_t)0x00000000) 207 #define ADxMOD0_AZFSH_SLOW ((uint32_t)0x00000008) 209 #define ADxMOD0_REFBSEL_MASK ((uint32_t)0x00000004) 210 #define ADxMOD0_REFBSEL_AVREFH ((uint32_t)0x00000000) 211 #define ADxMOD0_REFBSEL_AIN ((uint32_t)0x00000004) 213 #define ADxMOD0_RCUT_MASK ((uint32_t)0x00000002) 214 #define ADxMOD0_RCUT_NORMAL ((uint32_t)0x00000000) 215 #define ADxMOD0_RCUT_IREF_CUT ((uint32_t)0x00000002) 217 #define ADxMOD0_DACON_MASK ((uint32_t)0x00000001) 218 #define ADxMOD0_DACON_OFF ((uint32_t)0x00000000) 219 #define ADxMOD0_DACON_ON ((uint32_t)0x00000001) 230 #define ADxMOD1_TIME_0_50_AVDD_4_5 ((uint32_t)0x00304000) 231 #define ADxMOD1_TIME_0_62_AVDD_4_5 ((uint32_t)0x00304001) 232 #define ADxMOD1_TIME_0_85_AVDD_4_5 ((uint32_t)0x00304111) 233 #define ADxMOD1_TIME_2_00_AVDD_2_7 ((uint32_t)0x00304000) 243 #define ADxMOD2_TIME_0_50_AVDD_4_5 ((uint32_t)0x00000000) 244 #define ADxMOD2_TIME_0_62_AVDD_4_5 ((uint32_t)0x00000060) 245 #define ADxMOD2_TIME_0_85_AVDD_4_5 ((uint32_t)0x00000000) 246 #define ADxMOD2_TIME_2_00_AVDD_2_7 ((uint32_t)0x00000070) 263 #define ADxCMPEN_CMP1EN_MASK ((uint32_t)0x00000002) 264 #define ADxCMPEN_CMP1EN_DISABLE ((uint32_t)0x00000000) 265 #define ADxCMPEN_CMP1EN_ENABLE ((uint32_t)0x00000002) 267 #define ADxCMPEN_CMP0EN_MASK ((uint32_t)0x00000001) 268 #define ADxCMPEN_CMP0EN_DISABLE ((uint32_t)0x00000000) 269 #define ADxCMPEN_CMP0EN_ENABLE ((uint32_t)0x00000001) 287 #define ADxTSETn_ENINT_MASK ((uint32_t)0x00000080) 288 #define ADxTSETn_ENINT_DISABLE ((uint32_t)0x00000000) 289 #define ADxTSETn_ENINT_ENABLE ((uint32_t)0x00000080) 291 #define ADxTSETn_TRGS_MASK ((uint32_t)0x00000060) 292 #define ADxTSETn_TRGS_DISABLE ((uint32_t)0x00000000) 293 #define ADxTSETn_TRGS_CNT ((uint32_t)0x00000020) 294 #define ADxTSETn_TRGS_SGL ((uint32_t)0x00000040) 295 #define ADxTSETn_TRGS_TRG ((uint32_t)0x00000060) 297 #define ADxTSETn_AINST_MASK ((uint32_t)0x0000001F) 319 #define ADxREGn_ADOVRF_Mn_MASK ((uint32_t)0x20000000) 320 #define ADxREGn_ADOVRF_Mn_OFF ((uint32_t)0x00000000) 321 #define ADxREGn_ADOVRF_Mn_ON ((uint32_t)0x20000000) 323 #define ADxREGn_ADRF_Mn_MASK ((uint32_t)0x10000000) 324 #define ADxREGn_ADRF_Mn_OFF ((uint32_t)0x00000000) 325 #define ADxREGn_ADRF_Mn_ON ((uint32_t)0x10000000) 327 #define ADxREGn_ADR_Mn_MASK ((uint32_t)0x0FFF0000) 329 #define ADxREGn_ADRn_MASK ((uint32_t)0x0000FFF0) 331 #define ADxREGn_ADOVRFn_MASK ((uint32_t)0x00000002) 332 #define ADxREGn_ADOVRFn_OFF ((uint32_t)0x00000000) 333 #define ADxREGn_ADOVRFn_ON ((uint32_t)0x00000002) 335 #define ADxREGn_ADRFn_MASK ((uint32_t)0x00000001) 336 #define ADxREGn_ADRFn_OFF ((uint32_t)0x00000000) 337 #define ADxREGn_ADRFn_ON ((uint32_t)0x00000001) 385 __STATIC_INLINE int32_t
check_param_ain(uint32_t ain, uint32_t min, uint32_t max);
402 int32_t result = ADC_PARAM_NG;
406 result = ADC_PARAM_OK;
425 int32_t result = ADC_PARAM_NG;
431 result = ADC_PARAM_OK;
436 if ((min <= ain) && (ain <= max))
438 result = ADC_PARAM_OK;
457 int32_t result = ADC_PARAM_NG;
461 result = ADC_PARAM_OK;
This file provides all the functions prototypes for driver common part.
__STATIC_INLINE int32_t check_param_continuity_num(uint32_t max, uint32_t num)
Check the Max Num of continuity conversion's parameter.
Definition: txz_adc_include.h:455
All common macro and definition for TXZ peripheral drivers.
__STATIC_INLINE int32_t check_param_channel(uint32_t ch, uint32_t max)
Check the Channel Number parameter.
Definition: txz_adc_include.h:400
__STATIC_INLINE int32_t check_param_ain(uint32_t ain, uint32_t min, uint32_t max)
Check the AIN Range's parameter.
Definition: txz_adc_include.h:423