TMPM4KxA Group Peripheral Driver User Manual  V1.0.4.0
txz_i2c.h
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1 
13 /*------------------------------------------------------------------------------*/
14 /* Define to prevent recursive inclusion */
15 /*------------------------------------------------------------------------------*/
16 #ifndef __I2C_H
17 #define __I2C_H
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 /*------------------------------------------------------------------------------*/
24 /* Includes */
25 /*------------------------------------------------------------------------------*/
26 #include "txz_driver_def.h"
27 
37 /*------------------------------------------------------------------------------*/
38 /* Macro Function */
39 /*------------------------------------------------------------------------------*/
45 /* no define */
46  /* End of group UTILITIES_Private_macro */
50 
51 
52 /*------------------------------------------------------------------------------*/
53 /* Configuration */
54 /*------------------------------------------------------------------------------*/
60 /* no define */
61  /* End of group UTILITIES_Private_define */
65 
66 
67 /*------------------------------------------------------------------------------*/
68 /* Macro Definition */
69 /*------------------------------------------------------------------------------*/
75 #ifdef DEBUG
76 
81 #define I2C_NULL ((void *)0)
82  /* End of name I2C_NULL Pointer */
85 #endif
86 
92 #define I2CxST_NACK ((uint32_t)0x00000008)
93 #define I2CxST_I2CBF ((uint32_t)0x00000004)
94 #define I2CxST_I2CAL ((uint32_t)0x00000002)
95 #define I2CxST_I2C ((uint32_t)0x00000001)
96 #define I2CxST_CLEAR ((uint32_t)0x0000000F) /* End of name I2CxST Macro Definition */
100 
106 #define I2CxCR1_ACK ((uint32_t)0x00000010)
107 #define I2CxCR1_NOACK ((uint32_t)0x00000008)
108 #define I2CxCR1_BC ((uint32_t)0x000000E0) /* End of name I2CxCR1 Macro Definition */
113 
119 #define I2CxDBR_DB_MASK ((uint32_t)0x000000FF) /* !< DB 7-0 bits mask. */
120  /* End of name I2CxDBR Macro Definition */
123 
124 
130 #define I2CxCR2_PIN_CLEAR ((uint32_t)0x00000010)
131 #define I2CxCR2_I2CM_DISABLE ((uint32_t)0x00000000)
132 #define I2CxCR2_I2CM_ENABLE ((uint32_t)0x00000008)
133 #define I2CxCR2_SWRES_10 ((uint32_t)0x00000002)
134 #define I2CxCR2_SWRES_01 ((uint32_t)0x00000001)
135 #define I2CxCR2_START_CONDITION ((uint32_t)0x000000F8)
136 #define I2CxCR2_STOP_CONDITION ((uint32_t)0x000000D8)
137 #define I2CxCR2_INIT ((uint32_t)0x00000008) /* End of name I2CxCR2 Macro Definition */
142 
148 #define I2CxSR_MST ((uint32_t)0x00000080)
149 #define I2CxSR_TRX ((uint32_t)0x00000040)
150 #define I2CxSR_BB ((uint32_t)0x00000020)
151 #define I2CxSR_PIN ((uint32_t)0x00000010)
152 #define I2CxSR_AL ((uint32_t)0x00000008)
153 #define I2CxSR_AAS ((uint32_t)0x00000004)
154 #define I2CxSR_AD0 ((uint32_t)0x00000002)
155 #define I2CxSR_LRB ((uint32_t)0x00000001) /* End of name I2CxSR Macro Definition */
159 
165 #define I2CxPRS_PRCK ((uint32_t)0x0000001F) /* End of name I2CxPRS Macro Definition */
169 
175 #define I2CxIE_SELPINCD ((uint32_t)0x00000040)
176 #define I2CxIE_DMARI2CTX ((uint32_t)0x00000020)
177 #define I2CxIE_DMARI2CRX ((uint32_t)0x00000010)
178 #define I2CxIE_I2C ((uint32_t)0x00000001)
179 #define I2CxIE_CLEAR ((uint32_t)0x00000000) /* End of name I2CxIE Macro Definition */
184 
185 
191 #define I2CxOP_DISAL ((uint32_t)0x00000080)
192 #define I2CxOP_SA2ST ((uint32_t)0x00000040)
193 #define I2CxOP_SAST ((uint32_t)0x00000020)
194 #define I2CxOP_NFSEL ((uint32_t)0x00000010)
195 #define I2CxOP_RSTA ((uint32_t)0x00000008)
196 #define I2CxOP_GCDI ((uint32_t)0x00000004)
197 #define I2CxOP_SREN ((uint32_t)0x00000002)
198 #define I2CxOP_MFACK ((uint32_t)0x00000001)
199 #ifndef I2C_MULTI_MASTER
200  #define I2CxOP_INIT ((uint32_t)0x00000084)
201 #else
202  #define I2CxOP_INIT ((uint32_t)0x00000004)
203 #endif
204 #define I2CxOP_SLAVE_INIT ((uint32_t)0x00000084) /* End of name I2CxOP Macro Definition */
208 
214 #define I2CxAR_ALS ((uint32_t)0x00000001)
215 #define I2CxAR_INIT ((uint32_t)0x00000000)
216 #define I2CxAR2_INIT ((uint32_t)0x00000000) /* End of name I2CxAR Macro Definition */
221 
222 
228 #define I2CxPM_SDA_SCL ((uint32_t)0x00000003) /* SDA and SCL level. */
229  /* End of name I2CxPM Macro Definition */
232 
238 #define I2CxWUPCR_INT_RELESE ((uint32_t)0x00000001) /* Interrupt Release. */
239 #define I2CxWUPCR_INT_HOLD ((uint32_t)0x00000000) /* Interrupt setting keep it. */
240  /* End of name I2CxWUPCR_INT Macro Definition */
243 
249 #define I2CxWUPCR_RST_RESET ((uint32_t)0x00000010) /* I2C BUS Reset. */
250 #define I2CxWUPCR_RST_RELEASE ((uint32_t)0x00000000) /* I2C BUS Reset Release. */
251  /* End of name I2CxWUPCR_RST Macro Definition */
254 
255 
261 #define I2CxWUPCR_ACK ((uint32_t)0x00000020) /* ACK Output. Output "0" */
262 #define I2CxWUPCR_NACK ((uint32_t)0x00000000) /* ACL No Output. Output "1" NACK Output */
263  /* End of name I2CxWUPCR_RST Macro Definition */ /* End of group UTILITIES_Private_define */
269 
270 
271 /*------------------------------------------------------------------------------*/
272 /* Enumerated Type Definition */
273 /*------------------------------------------------------------------------------*/
279 /* no define */
280  /* End of group UTILITIES_Private_define */
284 
285 /*------------------------------------------------------------------------------*/
286 /* Structure Definition */
287 /*------------------------------------------------------------------------------*/
293 /*----------------------------------*/
297 /*----------------------------------*/
298 typedef struct
299 {
300  uint32_t sck;
301  uint32_t prsck;
303 
304 /*----------------------------------*/
308 /*----------------------------------*/
309 typedef struct
310 {
311  uint32_t ack;
312  uint32_t reset;
313  uint32_t intend;
315 
316 /*----------------------------------*/
320 /*----------------------------------*/
321 typedef struct
322 {
325 
326 /*----------------------------------*/
330 /*----------------------------------*/
331 typedef struct
332 {
335 
336 /*----------------------------------*/
340 /*----------------------------------*/
341 typedef struct
342 {
343  TSB_I2C_TypeDef *p_instance;
345 } I2C_t;
346 #if defined(I2CSxWUP_EN)
347 /*----------------------------------*/
351 /*----------------------------------*/
352 typedef struct
353 {
354  TSB_I2CS_TypeDef *p_instance;
356 } I2CS_t;
357 #endif
358  /* End of group UTILITIES_Private_typedef */
361 
362 /*------------------------------------------------------------------------------*/
363 /* Inline Functions */
364 /*------------------------------------------------------------------------------*/
369 __STATIC_INLINE void I2C_reset(I2C_t *p_obj);
370 __STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj);
371 __STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj);
372 __STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj);
373 __STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data);
374 __STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj);
375 __STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack);
376 __STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj);
377 __STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj);
378 __STATIC_INLINE int32_t I2C_master(I2C_t *p_obj);
379 __STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj);
380 __STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj);
381 __STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj);
382 __STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj);
383 __STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx);
384 __STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj);
385 __STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr);
386 __STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj);
387 
388 /*--------------------------------------------------*/
394 /*--------------------------------------------------*/
395 __STATIC_INLINE void I2C_reset(I2C_t *p_obj)
396 {
397 #ifdef DEBUG
398  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
399  {
400  p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
401  p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
402  }
403 #else
404  p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
405  p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
406 #endif
407 }
408 
409 /*--------------------------------------------------*/
417 /*--------------------------------------------------*/
418 __STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj)
419 {
420 #ifdef DEBUG
421  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
422  {
423  return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
424  }
425  return (0);
426 #else
427  return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
428 #endif
429 }
430 
431 /*--------------------------------------------------*/
438 /*--------------------------------------------------*/
439 __STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj)
440 {
441 #ifdef DEBUG
442  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
443  {
444  p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
445  }
446 #else
447  p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
448 #endif
449 }
450 
451 /*--------------------------------------------------*/
458 /*--------------------------------------------------*/
459 __STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj)
460 {
461 #ifdef DEBUG
462  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
463  {
464  return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
465  }
466  return (0);
467 #else
468  return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
469 #endif
470 }
471 
472 /*--------------------------------------------------*/
480 /*--------------------------------------------------*/
481 __STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data)
482 {
483 #ifdef DEBUG
484  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
485  {
486  p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
487  }
488 #else
489  p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
490 #endif
491 }
492 
493 /*--------------------------------------------------*/
501 /*--------------------------------------------------*/
502 __STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj)
503 {
504 #ifdef DEBUG
505  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
506  {
507  __IO uint32_t opreg = p_obj->p_instance->OP;
508  p_obj->p_instance->OP &= ~I2CxOP_RSTA;
509  return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
510  }
511  return (0);
512 #else
513  __IO uint32_t opreg = p_obj->p_instance->OP;
514  p_obj->p_instance->OP &= ~I2CxOP_RSTA;
515  return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
516 #endif
517 }
518 
519 /*--------------------------------------------------*/
527 /*--------------------------------------------------*/
528 __STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack)
529 {
530 #ifdef DEBUG
531  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
532  {
533  if (nack)
534  {
535  p_obj->p_instance->OP |= I2CxOP_MFACK;
536  }
537  else
538  {
539  p_obj->p_instance->OP &= ~I2CxOP_MFACK;
540  }
541  }
542 #else
543  if (nack)
544  {
545  p_obj->p_instance->OP |= I2CxOP_MFACK;
546  }
547  else
548  {
549  p_obj->p_instance->OP &= ~I2CxOP_MFACK;
550  }
551 #endif
552 }
553 
554 /*--------------------------------------------------*/
562 /*--------------------------------------------------*/
563 __STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj)
564 {
565 #ifdef DEBUG
566  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
567  {
568  return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
569  }
570  return (0);
571 #else
572  return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
573 #endif
574 }
575 
576 /*--------------------------------------------------*/
584 /*--------------------------------------------------*/
585 __STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj)
586 {
587 #ifdef DEBUG
588  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
589  {
590  return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
591  }
592  return (0);
593 #else
594  return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
595 #endif
596 }
597 
598 /*--------------------------------------------------*/
606 /*--------------------------------------------------*/
607 __STATIC_INLINE int32_t I2C_master(I2C_t *p_obj)
608 {
609 #ifdef DEBUG
610  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
611  {
612  return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
613  }
614  return (0);
615 #else
616  return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
617 #endif
618 }
619 
620 /*--------------------------------------------------*/
628 /*--------------------------------------------------*/
629 __STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj)
630 {
631 #ifdef DEBUG
632  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
633  {
634  return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
635  }
636  return (0);
637 #else
638  return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
639 #endif
640 }
641 
642 /*--------------------------------------------------*/
650 /*--------------------------------------------------*/
651 __STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj)
652 {
653 #ifdef DEBUG
654  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
655  {
656  return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
657  }
658  return (0);
659 #else
660  return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
661 #endif
662 }
663 
664 /*--------------------------------------------------*/
671 /*--------------------------------------------------*/
672 __STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj)
673 {
674 #ifdef DEBUG
675  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
676  {
677  p_obj->p_instance->ST = I2CxST_CLEAR;
678  }
679 #else
680  p_obj->p_instance->ST = I2CxST_CLEAR;
681 #endif
682 }
683 
684 /*--------------------------------------------------*/
691 /*--------------------------------------------------*/
692 __STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj)
693 {
694 #ifdef DEBUG
695  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
696  {
697  p_obj->p_instance->IE = I2CxIE_I2C;
698  }
699 #else
700  p_obj->p_instance->IE = I2CxIE_I2C;
701 #endif
702 }
703 
704 /*--------------------------------------------------*/
712 /*--------------------------------------------------*/
713 __STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx)
714 {
715 #ifdef DEBUG
716  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
717  {
718  if (tx)
719  {
720  p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CTX);
721  }
722  else
723  {
724  p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CRX);
725  }
726  }
727 #else
728  if (tx)
729  {
730  p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CTX);
731  }
732  else
733  {
734  p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CRX);
735  }
736 #endif
737 }
738 
739 /*--------------------------------------------------*/
746 /*--------------------------------------------------*/
747 __STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj)
748 {
749 #ifdef DEBUG
750  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
751  {
752  p_obj->p_instance->IE = I2CxIE_CLEAR;
753  }
754 #else
755  p_obj->p_instance->IE = I2CxIE_CLEAR;
756 #endif
757 }
758 
759 /*--------------------------------------------------*/
767 /*--------------------------------------------------*/
768 __STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr)
769 {
770 #ifdef DEBUG
771  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
772  {
773  p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
774  p_obj->p_instance->AR2 = I2CxAR2_INIT;
775  }
776 #else
777  p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
778  p_obj->p_instance->AR2 = I2CxAR2_INIT;
779 #endif
780 }
781 
782 /*--------------------------------------------------*/
789 /*--------------------------------------------------*/
790 __STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj)
791 {
792 #ifdef DEBUG
793  if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
794  {
795  return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
796  && ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
797  }
798  return (0);
799 #else
800  return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
801  && ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
802 #endif
803 }
804  /* End of group UTILITIES_Private_functions */
808 
809 /*------------------------------------------------------------------------------*/
810 /* Functions */
811 /*------------------------------------------------------------------------------*/
816 void I2C_init(I2C_t *p_obj);
817 void I2C_start_condition(I2C_t *p_obj, uint32_t data);
818 uint32_t I2C_get_clock_setting(I2C_t *p_obj, uint32_t frequency, uint32_t fsys, I2C_clock_setting_t *p_setting);
819 void I2C_slave_init(I2C_t *p_obj);
820 #if defined(I2CSxWUP_EN)
821 void I2CS_init(I2CS_t *p_obj);
822 void I2CS_Primary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
823 void I2CS_Secondary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
824 #endif
825  /* End of group UTILITIES_Private_functions */
828  /* End of group UTILITIES */
832  /* End of group Example */
836 
837 #ifdef __cplusplus
838 }
839 #endif /* __cplusplus */
840 #endif /* __I2C_H */
841 
842 
void I2C_slave_init(I2C_t *p_obj)
Slave mode setting.
Definition: txz_i2c.c:294
I2CS handle structure definenition.
Definition: txz_i2c.h:352
TSB_I2C_TypeDef * p_instance
Definition: txz_i2c.h:343
Wakeup Control setting structure definenition.
Definition: txz_i2c.h:309
uint32_t intend
Definition: txz_i2c.h:313
void I2C_init(I2C_t *p_obj)
Initializing I2C Regester.
Definition: txz_i2c.c:166
__STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj)
Interrupt Status.
Definition: txz_i2c.h:651
__STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj)
Return The Transmitter.
Definition: txz_i2c.h:629
__STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj)
Return restart condition.
Definition: txz_i2c.h:502
Clock setting structure definenition.
Definition: txz_i2c.h:298
TSB_I2CS_TypeDef * p_instance
Definition: txz_i2c.h:354
__STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj)
Read from Data buffer.
Definition: txz_i2c.h:459
I2C_clock_setting_t clock
Definition: txz_i2c.h:323
__STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj)
Return received Ack condition.
Definition: txz_i2c.h:563
__STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx)
Enable Interrupt setting.
Definition: txz_i2c.h:713
__STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj)
Disable Interrupt setting.
Definition: txz_i2c.h:747
__STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr)
Set slave address.
Definition: txz_i2c.h:768
void I2CS_Secondary_slave_adr_set(I2CS_t *p_obj, uint32_t adr)
Secondary Slave Address setting.
Definition: txz_i2c.c:363
uint32_t sck
Definition: txz_i2c.h:300
__STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj)
Return Busy condition.
Definition: txz_i2c.h:585
uint32_t ack
Definition: txz_i2c.h:311
__STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj)
Interrupt Status Clear.
Definition: txz_i2c.h:672
uint32_t reset
Definition: txz_i2c.h:312
void I2C_start_condition(I2C_t *p_obj, uint32_t data)
Generate start condition.
Definition: txz_i2c.c:194
__STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj)
I2C bus port high.
Definition: txz_i2c.h:418
All common macro and definition for TXZ peripheral drivers.
__STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj)
Detecting Slave Address.
Definition: txz_i2c.h:790
I2CS_initial_setting_t init
Definition: txz_i2c.h:355
uint32_t I2C_get_clock_setting(I2C_t *p_obj, uint32_t frequency, uint32_t fsys, I2C_clock_setting_t *p_setting)
Return the I2c clock setting.
Definition: txz_i2c.c:232
__STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data)
Write to Data buffer.
Definition: txz_i2c.h:481
__STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack)
Set Ack condition.
Definition: txz_i2c.h:528
__STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj)
Enable Interrupt setting.
Definition: txz_i2c.h:692
__STATIC_INLINE int32_t I2C_master(I2C_t *p_obj)
Return The Master status.
Definition: txz_i2c.h:607
__STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj)
Generate stop condition.
Definition: txz_i2c.h:439
uint32_t prsck
Definition: txz_i2c.h:301
void I2CS_init(I2CS_t *p_obj)
I2C Wakeup Control setting.
Definition: txz_i2c.c:319
__STATIC_INLINE void I2C_reset(I2C_t *p_obj)
I2C software reset.
Definition: txz_i2c.h:395
Initial setting structure definenition.
Definition: txz_i2c.h:321
I2C handle structure definenition.
Definition: txz_i2c.h:341
I2C_initial_setting_t init
Definition: txz_i2c.h:344
void I2CS_Primary_slave_adr_set(I2CS_t *p_obj, uint32_t adr)
Primary Slave Address setting.
Definition: txz_i2c.c:341
Initial setting structure definenition.
Definition: txz_i2c.h:331
I2CS_wup_setting_t wup
Definition: txz_i2c.h:333