Toshiba gives an overview on the evolution of the upcoming generation of mass storage in mobile devices. This evolution from eMMC to UFS offers significant benefits in terms of performance and low power consumption for end users. UFS enables a better user-experience by maximizing the steadily increasing performances of mobile devices, including multi-threading processors. Learn more about UFS capabilities and Toshiba’s contribution to the UFS ecosystem deployment, including UFS software and UFS hardware prototyping and validation platforms.
Toshiba Electronics Europe provided further evidence of its commitment to next-generation designs built using the MIPI® UniProSM and M-PHYSM specifications by announcing the world’s first demonstration system to support version 1.1 of the JEDEC UFS standard.
Unveiled at the All-Members meeting of the MIPI® Alliance in Berlin, the Toshiba demonstration is a complete testing environment for next-generation memory solutions built around the latest UFS specification. Toshiba's comprehensive UFS 'ecosystem' brings together a UFS memory device, UFS host controller IP and UFS software drivers. The result is a prototyping and testing system that will speed up UFS designs, enable interoperability and ensure smooth integration with host processors.
New and emerging mobile devices demand higher performances with lower power consumption and reduced pin-counts for embedded flash memory storage. To support these demands designers need to provide performance at much lower energy-per-bit ratios and enable multi task OS support. To help designers address these challenges Toshiba has played a leading role in the specification and design of dual-simplex serial interfaces based on MIPI UniPro and M-PHY. The company’s latest implementation of such an interface uses the MIPI UniPro version 1.41 and MIPI M-PHY version 2.0 Specifications. In addition Toshiba has established a full eco-system of device and host controllers - as well as IP for key building blocks - that provides the market with a complete environment that supports development, inter-operability and deployment using the new interface standards.
Toshiba has been actively involved in UFS since its inception and has made significant contributions to the development of JEDEC standard as it relates to both the UFS memory device and the host controller. As an active Promoter Member of the MIPI Alliance the company has also played a major role in developing and supporting the M-PHY interface and UniPro universal chip-to-chip protocol that form the basis of the UFS interconnect layer.
|Multi Task OS Support||Single Function||Multiple partitions (LUN) Parallel function||No|
|Multi Command Handlind||Packed Commands||Command Queue||Command Queue|
|Background Operation Control||Host/Device||Host/Device||Device Only|
|Max I/F Speed||200MB/s
||300MB/s -> 600MB/s
|Topology||Bus (Half Duplex)||Chain (Full Duplex)||Point to Point|
|Partitions||Up to 4||Up to 8||1 (device level)|
|Write Reliability / Enhanced Reliable Write||Yes||Yes||TBD|
UFS is designed to be the most advanced specification for both embedded and removable flash memory-based storage in mobile devices such as smart phones and tablet computers. The UFS standard represents an evolutionary progression of JEDEC standards in this field, and has been specifically tailored for mobile applications and computing systems requiring high performance and low power consumption. The initial data throughput for UFS will be 300 megabytes per second (MB/s), and the standard also supports command queuing features to raise random read/write speeds.
To achieve the highest performance and most power efficient data transport, UFS uses the leading industry interface standards to form its Interconnect Layer: MIPI® Alliance’s M-PHY and UniProSM specifications. UniPro is a comprehensive specification meant to act as a universal chip-to-chip protocol, providing a common tunnel for other protocols. The M-PHY interface is designed as the primary physical interface (PHY layer) for the UniPro specification, and is a high speed serial interface targeting up to 2.9 gigabits per second (Gbps) per lane with up-scalability to 5.8Gbps per lane.
More information about MIPI specifications related to UFS can be found at: http://www.mipi.org/about-mipi/industry-associations/jedec-solid-state-technology-association.
The UFS standard adopts the well-known SCSI Architecture Model and command protocols supporting multiple commands with command queuing features and enabling a multi-thread programming paradigm. This differs from conventional flash-based memory cards and embedded flash solutions which process one command at a time, limiting random read/write access performance. In addition, a complementary UFS Host Controller Interface (HCI) specification allows system designers greater flexibility by simplifying the involvement of the host processor in the operation of the flash storage subsystem. The UFS HCI specification and the adoption of SCSI provides a well-known software programming model and enable wider market adoption.
Work on UFS is coordinated by JEDEC's JC-64 Committee for Embedded Memory Storage and Removable Memory Cards, and is supported by principal consumer electronic and cell phone OEMs.
UFS: Universal Flash Storage