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Datasheet Modifications: Additional cautions on use of clock multiplication circuit (PLL)

Product Types
TOSHIBA Microcontrollers TX19A/H1 series
  • TMP19A44FDAXBG
  • TMP19A44F10XBG
  • TMP19A44FEXBG
  • TMP19A31CYFG

This is to inform you of additional cautions on use of the clock multiplication circuit (PLL) built-in TX19A/H1 series described in the datasheet.
If you need any further information, please contact your local Toshiba sales representative.

Revised content

< Before correction >

5.6 Clock Multiplication Circuit (PLL)

This circuit outputs the fpll clock that is multiplied by eight of the high-speed oscillator output clock, fosc. This lowers the oscillator input frequency while increasing the internal clock speed.

< After correction >

5.6 Clock Multiplication Circuit (PLL)

This circuit outputs the fpll clock that is multiplied by eight of the high-speed oscillator output clock, fosc. This lowers the oscillator input frequency while increasing the internal clock speed.

(Note) When starting PLL operation, a stable time of approximately 100μs must be specified by the warm-up function for lock-up time.

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