Part Number Search

Cross Reference Search

About information presented in this cross reference

The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.

Keyword Search

Parametric Search

Stock Check & Purchase

Select Product Categories

Select Application

Find everything you need for your next product design. Simply select an application and click through to the block diagram to discover our semiconductor solutions.

New Products / News

Innovation Centre

At the Toshiba Innovation Centre we constantly strive to inspire you with our technologies and solutions. Discover how to place us at the heart of your innovations.

TZ2101XBG

EOL announced

ApP Lite

Description

Feature Arm® Cortex®-A9 Clock:600MHz(Max) / DDR3/3L I/F, 1MB SRAM embeded / Graphics Acceleration, Camera input, LCD controller / Low power system technology, Long-term data retention / Secure Boot, Secure Service / USB2.0/Ether
Application Scope Amusement system / Environment data mining system / Smart home appliance / User interface system
RoHS Compatible Product(s) (#) Available
I/O Camera input (Parallel) / DDR3/DDR3L / Ether / External Bus / I2C / I2S / LCD Output (Parallel) / SDIO/e∙MMC™ / SPI / UART / USB2.0
CPU Arm® Cortex®-A9 MPCore
FPU Available
RAM 1MByte SRAM / 32kByte SRAM(Back-up)
graphic engine TOSHIBA original graphics accelerator
Cache L1D Cache: 16kByte / L1I Cache: 16kByte / L2 Cache:128kByte
Secure boot system control, data encryption service Available
high speed interface controller USB2.0 host interface / USB2.0 device interface / 10/100 Ethernet MAC
DRAM controller DDR3/DDR3L×16bit
LCD controller WVGA(800×480) 60fps, 24bit Parallel I/F
Expansion bus I/F Address: 27bit, Data:32bit
Peripherals DMA controller / Timer/counter / RTC
Peripheral I/F Camera I/F, UART×4, I2C×4, I2S×2, SPIM×7, SPIB×2,PWM×6, 12bitADC×4, SDIO×3, eMMCx1, GPIO

Package Information

Toshiba Package Name P-LFBGA310-1616-0.80-001
Pins 310
Package size 16mm x 16mm x 1.6mm
Pin pitch 0.8mm

 Please refer to the link destination to check the detailed size.

Notes

back to list
A new window will open
To Top