Uma nova janela será aberta
Customers want us to be involved in ASIC development at various phases. Drawing on our extensive experience in ASSP development, Toshiba can work with you as early as the concept phase.In order to support your ASIC development, Toshiba provides pre-verified subsystems as well as libraries designed to enable FPGA prototyping.
Additionally, Toshiba employs low-power design, high-performance place-and-route (P&R) and other layout technologies to achieve competitive products.
Power, performance and area (PPA) optimization was achieved by redefining the performance and functional requirements based on use-case analysis and employing Toshiba’s unique technologies.
As a result of the analysis, Toshiba proposed changing the CPU frequency and the on-chip bus structure in order to reduce power consumption and manufacturing cost while maintaining the overall system performance.
Furthermore, the use of Toshiba’s pre-verified IP subsystems helped the customer reduce the amount and period of development work.