Toshiba invented NAND flash memory in 1987 and was the first in the world to begin mass-producing it in 1991. Since then, Toshiba has continuously increased the capacity of NAND flash memory by shrinking the design rule and process technology node.
However, process migration poses various challenges. It is becoming extremely difficult to further increase memory capacity using the conventional planar NAND flash memory technology.
To solve this problem, Toshiba invented a new process whereby flash memory chips are stacked vertically. In 2007, Toshiba was the first in the world*1 to announce a three-dimensional (3D) flash memory stacking technology. As a result of further development, Toshiba has released 3D flash memory: BiCS FLASH™
Due to the advent of the Internet of Things (IoT), the prevalence of social networking services (SNSs), and production of photos and videos at ever-higher resolution, the volume of data generated worldwide is growing exponentially.
In the field of information processing, real-time performance is considered an important requirement as a huge amount of data must be managed by big-data systems or indefinitely stored by data centers and cloud service systems. In this situation, high-capacity storage is required to process, store and manage large quantities of data at high speed and low power consumption.
Furthermore, for smartphone, tablet, memory card and other power-sensitive applications, demand for storage with lower power consumption is increasing.
BiCS FLASH, which offers many advantages over planar NAND flash memory, will be the solution satisfying the market requirements.
The vertically stacked three-dimensional (3D) flash memory, BiCS FLASH, has far higher die area density compared to the prior state-of-the-art technology, two-dimensional (2D) NAND flash memory. Moreover, BiCS FLASH reduced the chip size by optimizing both circuit technology and manufacturing process. 96-layer BiCS FLASH, which is announced on June 28th, 2017, provides approximately 1.4 times the storage capacity per unit area compared with 64-layer BiCS FLASH.
Spaces between memory cells in BiCS FLASH are far wider than in 2D NAND flash memory. This made it possible to improve the programming speed by increasing the amount of data for a single-shot programming sequence.
BiCS FLASH’s wide open spaces between memory cells reduce cell coupling and improve reliability compared to the 2D NAND flash memory.
BiCS FLASH reduced the power consumption per unit of programming data by increasing the amount of data for a single-shot programming sequence (i.e., faster programming speed) compared to the 2D NAND flash memory.