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FPGA prototyping support (Easy Prototyping)

Toshiba proposes Easy Prototyping to reduce the workload of custom SoC development with FPGA prototyping.

The increasing scale, cost and complexity of ASIC development are fueling rising demand for parallel development with software in order to reduce the development risk and secure appropriate software development time.
On the other hand, FPGA IP and library can’t be used for custom SoC development such as ASIC and FFSATM, and RTL code of FPGA prototype is different from RTL code of custom SoCs.
Therefore, customers need to use their resources to:

  • develop two types of RTL code for FPGA prototype and custom SoCs
  • redesign and re-verify part of the software developed for FPGA prototype

Customers can easily develop one RTL code for both FPGA prototype and custom SoCs by leveraging Toshiba’s library and IP subsystems available for Easy Prototyping.
We adopt FPGA-friendly IP, including 3rd party IP, which has a good track record in FPGA, in subsystems.
Software developed for FPGA prototypes is usable, in principle, for custom SoCs.

By leveraging Easy Prototyping, the customer significantly reduces the workload of redevelopment of RTL code and software

By leveraging Easy Prototyping, the customer significantly reduces the workload of redevelopment of RTL code and software, and is able to market the products with FPGA prototyping while reducing the development risk.
Easy Prototyping is available for Toshiba’s ASIC and FFSA™ platforms.

Example of ASIC development with Easy Prototyping
(Example of ASIC development with Easy Prototyping)

* All other company names, product names, and service names mentioned herein may be trademarks of their respective companies.

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