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About information presented in this cross reference
The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application. Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected. TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.
Overall block diagram
Sub block diagram
Main processing circuit
Examples of main processing circuits that are interlocked with various systems after the occurrence of probabilities