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Toshiba Develops SiC MOSFET with Embedded Schottky Barrier Diode that Delivers Low On-Resistance and High Reliability

December 9, 2022

Toshiba Electronic Devices & Storage Corporation
Toshiba Corporation

KAWASAKI--Toshiba Electronic Devices & Storage Corporation and Toshiba Corporation (collectively “Toshiba”) have developed an SiC metal oxide semiconductor field effect transistor (MOSFET) that arranges embedded Schottky barrier diodes (SBD) in a check pattern (check-pattern embedded SBD) to realize both low on-resistance and high reliability. Toshiba has confirmed that the design secures an approximately 20% reduction in on-resistance[1] (RonA) against its current SiC MOSFET, with no loss of reliability.[2]

Power devices are essential components for managing electric energy and reducing power loss in all kinds of electronic equipment, and for achieving a carbon neutral society. SiC is widely seen as the next generation material for the devices, as it delivers higher voltages and lower losses than silicon. While use of SiC now largely limited to inverters for trains, wider application is on the horizon, in areas including vehicle electrification and the miniaturization of industrial equipment. However, there is a problem that must first be overcome: bipolar conduction in the body diode during reverse operation of SiC MOSFET is harmful because it degrades on-resistance. 

Toshiba Electronic Devices & Storage Corporation developed a device structure that embeds SBDs into the MOSFET to inactivate body diodes, but it found that replacing the MOSFET channel with an embedded SBD lowers channel density and increases RonA. This trade-off has now been resolved with a new embedded SBD structure, and Toshiba has confirmed that it dramatically improves performance characteristics.

Toshiba has improved both conduction loss in its SBD-embedded SiC MOSFET, and achieved good diode conductivity, by deploying a check-pattern SBD distribution. Evaluation of the on-side current characteristics of 1.2kV-class-SBD-embedded MOSFETs with the optimized design confirmed that using the check design to position the embedded-SBDs close to the body diodes effectively limits bipolar conduction of the parasitic diodes, while the unipolar current limit of reverse conduction is double that realized by the current striped SBD pattern design for the same SBD area consumption. RonA was found to be approximately 20% lower, at 2.7mΩ・cm2.

This confirmed improvement in the trade-off is essential if SiC MOSFETs are to be used in inverters for motor drive applications. Toshiba is continuing to carry out evaluations toward improving dynamic characteristics and reliability, and to develop attractive, high performance power semiconductors that contribute to carbon neutrality.

Details of the achievement were reported at the 68th Annual IEEE International Electron Devices Meeting, an international power semiconductor conference held in San Francisco, USA, on December 3 to 7.

Notes:
[1] On-resistance is the resistance value between the drain and source of a MOSFET during operation (ON) 
[2] As of November 2022, Toshiba research.

Schematic diagram of MOSFETs with newly developed check pattern embedded SBD-SiC MOSFET

Schematic diagram of MOSFETs with newly developed check pattern embedded SBD-SiC MOSFET

Trade-off of characteristics of 1,2kV-class-SiC MOSFET

Trade-off of characteristics of 1,2kV-class-SiC MOSFET

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