June 9, 2025
Toshiba Electronic Devices & Storage Corporation
Kawasaki, Japan-Toshiba Electronic Devices & Storage Corporation (“Toshiba”) has developed innovative technology that significantly reduces losses (on-resistance[1]) in silicon carbide (SiC) trench MOSFETs[2] while enhancing UIS ruggedness[3]. Additionally, Toshiba has developed SiC semi-super junction[4] Schottky barrier diodes (SJ-SBDs) that suppress the increase in on-resistance at high temperatures. These advances are expected to greatly improve the reliability and efficiency of devices used in power conversion applications, such as electric vehicles and renewable energy systems.
Power semiconductors, which supply and control power, are essential for energy-saving in all electrical equipment, and achieving carbon neutrality. With the electrification of automobiles and the miniaturization of industrial equipment, demand for power semiconductors is expected to continue to grow. This is particularly true of SiC MOSFETs, which are gaining attention as next-generation devices that improve better power conversion efficiency than current silicon (Si) MOSFETs. Among them, SiC trench MOSFETs, where gates are formed in a trench to reduce on-resistance, and SiC Schottky barrier diodes (SBDs), which efficiently convert power by metal semiconductor junction on SiC, are widely used in high-efficiency power conversion applications, such as electric vehicles and renewable energy systems. However, these applications require operation in high-temperature environments that pose challenges for reliability and efficiency improvement.
SiC trench MOSFETs must protect the gate oxide from high electric fields. However, the relationship between UIS ruggedness and the grounding resistance[5] of the electric field protection structure[6] has not been clearly understood, making it difficult to achieve both high gate oxide reliability and low on-resistance.
In addition, although SiC SBDs can operate at higher temperatures than conventional Si SBDs, they must be able to handle increased resistance at elevated temperatures, which leads to higher on-resistance.
Toshiba has developed two key technologies to address these issues.
Toshiba has confirmed that forming a protective layer called a Bottom p-well in the trench of SiC trench MOSFETs (Figure 1) and making appropriate reductions in the grounding resistance of the Bottom p-well improves UIS ruggedness. This clarified the previously uncertain relationship between UIS ruggedness and the grounding resistance of the electric field protection structure. The SiC trench MOSFETs prototyped by Toshiba reduced on-resistance by approximately 20% compared to conventional planar SiC MOSFETs (Figure 2).
Toshiba also developed SiC SJ-SBDs that reduce resistance in the drift layer by placing pillars[7] within in that suppress resistance increases at high temperatures (Figure 3 (b)). By comparing the on-resistance changes in conventional SiC SBDs (Figure 3 (a)) and SiC SJ-SBDs at different temperatures[8], Toshiba confirmed the lower on-resistance of the SiC SJ-SBDs, especially at high temperatures (Figure 4). This is due to the SJ structure, which achieves a flat electric field distribution and reduce on-resistance. The 650V SiC SJ-SBDs developed by Toshiba reduces on-resistance by approximately 35% at high temperatures of 175°C (448.15K) compared to conventional SiC SBDs.
These two technologies further reduce loss in SiC trench MOSFETs and SiC SBDs, improving the reliability and efficiency of devices for use in future high-efficiency power conversion applications. Such application is particularly expected in fields such as electric vehicles and renewable energy systems. Toshiba aims to further improve the technologies and achieve early practical application.
Toshiba presented details of the new technologies at the 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD) 2025 held in Kumamoto from June 1 to 5. This achievement was based on results obtained from a project subsidized by the New Energy and Industrial Technology Development Organization (NEDO).
[1] On-resistance is the resistance value between the drain and source of a MOSFET during operation (ON)
[2] MOSFET: Metal Oxide Semiconductor Field Effect Transistor, a switching device with three electrodes: gate, drain, and source. Current between the drain and source is switched on and off by applying a gate voltage.
[3] UIS (Unclamped Inductive Switching) Ruggedness: A measure of a power device’s ability to withstand energy surges caused by inductive loads during switching. Higher UIS ruggedness indicates better durability and reliability under harsh operating conditions.
[4] Super Junction (SJ): A structure in which alternating p-type and n-type pillars are formed in the drift layer
[5] Grounding Resistance: The total resistance of the p-type region extending from the Bottom p-well structure to the source metal.
[6] Electric Field Protection Structure: A structural feature in trench MOSFETs designed to mitigate the electric field applied to the gate oxide layer when the device is in the off-state (i.e., not conducting current). This helps enhance the reliability of the gate oxide under high-voltage conditions.
[7] Pillars: Columnar regions of doped semiconductor material formed within the drift layer. In SJ-SBDs, p-type and n-type pillars are alternately arranged to create a super junction structure.
[8] On-Resistance of SBD: Calculated from the slope of the current–voltage (I–V) curve, with the resistance of the SiC substrate subtracted.
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