Toshiba Unveils 130nm FFSA™ Development Platform Featuring High Performance, Low Power and Low Cost Structured Array

November 13, 2018

Toshiba Electronic Devices & Storage Corporation

FFSA 130nm
(Artist’s impression of FFSA™)

- Long-term supply using a subsidiary’s fab -

TOKYO– Toshiba Electronic Devices & Storage Corporation (“Toshiba”) today announced a new 130nm manufacturing process node based FFSA™ (Fit Fast Structured Array), an innovative custom SoC development platform featuring high performance, low cost and low power consumption[1].

Toshiba provides ASIC (Application Specific IC) and FFSA™ platforms that suit the customer's business environment and requirements, that also deliver efficient solutions for custom SoC development. FFSA™ devices use a silicon-based master slice which is common in combination with upper metal layers that are reserved for customization. By customizing only a few masks, FFSA™ offers much lower NRE costs than individual ASIC development. It also enables significant reductions in development cost and provides samples and mass-production in a short period of time than for conventional ASIC’s. Additionally, FFSA™ enables higher performance and lower power consumption than FPGA (Field Programmable Gate Array) using ASIC design methodology and its library. [1]

The 130nm process series joins Toshiba’s current 28nm, 40nm, and 65nm process portfolio making FFSA™ a suitable option for the growing industrial equipment market.

The 130nm FFSA™ devices designed on the platform will be manufactured by Japan Semiconductor, a subsidiary of Toshiba Electronic Devices & Storage Corporation with a long and proven history of expertise in manufacturing ASIC, ASSP and microcomputers. This will ensure long-term supply and meet the needs of customer business continuity plans.

The new series deliver the performance and integration needed for industrial apparatus, communication facilities, OA equipment and consumer products where steady market expansion is expected.

FFSA™ lineup

Process technology 130nm 65nm 40nm 28nm
The maximum gate number[2] 912Kgate 21Mgate 25Mgate 100Mgate
Maximum SRAM capacity 664Kbit 19Mbit 30Mbit 207Mbit
Maximum transceiver speed 12.5Gbps 28Gbps
Number of maximum transceiver lanes 14 64
Number of maximum I/O pins 337 1110 720 928


[1] Toshiba in-house comparisons of conventional FPGA products.

[2] The number of available gates is a guideline and will vary by application.

* FFSA™ is a trademark of Toshiba Electronic Devices & Storage Corporation.

* All other company names, product names and service names may be trademarks of their respective companies.

Customer Inquiries:

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Tel: +81-44-548-2753

Information in this document, including product prices and specifications, content of services and contact information, is current on the date of the announcement but is subject to change without prior notice.