Obtaining necessary voltage when a bias resistor built-in transistor (BRT) is on (i.e., reducing a collector-emitter voltage drop in the “on” state)

Figure 1 shows a basic switch circuit using an NPN BRT.
When the NPN BRT is on in the saturation region, its collector voltage drops to the GND level because of an external resistor (R_L) and the collector current (I_C). In practice, however, there is a voltage level called collector-emitter saturation voltage (V_CE(sat)) between the collector and GND (emitter) potentials. V_CE(sat) can be reduced by increasing the base current (I_B).
(Because V_CE(sat) << V_CC when the circuit of Figure 1 is in the “on” state, I_C = V_CC / R_L, which is almost constant. Therefore, increasing I_B causes h_FE (= I_C / I_B) to decrease. This means that the BRT goes into deeper saturation, reducing V_CE(sat).)

Usually, only a limited range of voltage can be applied to the base. So, let’s consider how to pass more base current (I_b) at a given base voltage.

The internal base current (I_b) is expressed as follows:
    I_b ＝ I_B – I_R2 = ( V_I – V_be ) / R₁ – V_be / R₂

where V_I is the input voltage and V_be is the base-emitter voltage of the internal transistor, which can be considered constant at roughly 0.7 V *.

The I_b equation indicates that I_b can be increased by using a BRT with:
1)    Small R₁ value
2)    Large R₂ value　
This does not mean a BRT with a small resistor ratio (R₁/R₂), but a BRT with a small R₁ value. Such BRTs pass a greater current to to the base at a given input voltage (V_I).
However, the drawback of such BRTs is that they consume more power and enter deeper saturation, causing the switching speed to decrease. Also, the saturation voltage increases as temperature increases, as shown in Figure 4.
Take these factors into consideration to achieve the optimum design.