Building a More Efficient DC-DC Converter: Efficiency Evaluation and Loss Analysis of a 300 W Isolated DC-DC Converter

A 300 W DC-DC converter evaluation board was built to gain insight into the losses involved. A simplified circuit diagram is shown in Figure 2.

In this circuit, the primary-side (input side) serves as the input and has two legs and four switching devices (TR₁, TR₂, TR₃, and TR₄). The secondary-side (output side) has two devices (TR₅ and TR₆). These are intended for synchronous rectification. Additionally included is an output smoothing filter with a capacitance of C₂ and an inductor of L₂. The input voltage is V_i, the output load is R_L, and Vsync₁ and Vsync₂ are the drain voltages for TR₆ and TR₅, respectively. Observe that TR₅ and TR₆ have two MOSFETs connected in parallel.

The converter outputs 12 V using a phase-shifted full-bridge (PSFB) topology. The output voltage is regulated by phase-shifted operation between a leg of TR₁, TR₂, and the leg of TR₃, and TR₄ with a 50 % duty cycle. To prevent shoot-through in the dead time between the high side MOSFET and low side MOSFET, zero voltage switching (ZVS) is achieved to reduce the switching loss of the power converter.

Table 1 shows input and output characteristics of 300 W DC-DC converter.

The waveforms associated with all eight operating modes are summarized in Figure 5. In these simplified waveforms, the following is depicted: gate voltage (V_G) and drain current (I_D) of the switching devices TR₁ to TR₆, drain-source voltage (V_sync1, V_sync2) of TR₅ and TR₆, and voltage between the terminals (V_L2) and the current (I_L2) of the inductor L₂. Recognize that the current through TR₅ and TR₆ are denoted as negative because current flows from the source to the drain.

The formula used to calculate efficiency is:

Efficiency = (V_out × I_out) / (V_in × I_in) × 100 [%]

Figure 6 displays the setup for evaluating the efficiency of the 300 W isolated DC-DC converter circuit. V_in, I_in, V_out and I_out were measured for two patterns of switching device combinations under these conditions: V_in = 48 V, V_out = 12 V, and T_a (ambient temperature) = 25 °C with I_out at 1 A, 3 A, 5 A, 7 A, 10 A, 14 A, 16 A, 18 A, 20 A, and 25 A. The DC-DC converter circuit board is forcibly air-cooled using a cooling fan located near the circuit board.

Figure 7 (a) to (c) compares the efficiency curves using the TPH2R408QM and Company A’s MOSFET. As expected, the TPH2R408QM exhibits the highest efficiency level for medium and heavy loads because conduction loss is the main element of loss in such loads. In addition to this, the TPH2R408QM has a smaller drain-source on-resistance. The maximum efficiency is 94.83 % at 16 A of output load and 94.12 % at 25 A of full load.

In contrast, the drain-source on-resistance of Company A’s MOSFET is approximately 16 % larger than the TPH2R408QM, with efficiencies of 94.65 % at 16 A of output load and 93.89 % at 25 A of full load.

Figure 8 illustrates the relationship between device temperature and output current for both types of MOSFETs. Notably, the TPH2R408QM exhibits temperatures consistently lower than 45 °C, indicating less heat generation than the MOSFET manufactured by Company A.

Loss analysis was performed using a simulator circuit with a high-accuracy device model specifically designed for loss analysis. The evaluation board uses a phase-shifted full-bridge PWM controller IC, but this simulation circuit uses the alternative control model making feedback according to the voltage and current sensing. The simulation circuit is found in Figure 9. The transformer and reactors are based on measurement results. Additional details on simulation design are found  in the Application Note.

After the simulation was verified, results related to loss definition of the secondary MOSFETs were performed. Figure 10 shows how I and V are defined, the timing chart of the secondary MOSFET, and how each form of loss is calculated based on the timing chart. Each loss section is based on a segment of time and six types of losses were calculated. 

The results of loss analysis for the secondary MOSFETs, in the case of TPH2R408QM, are plotted in Figure 11. The dominant form of loss is the recovery loss of the body diodes (which is not sensitive to current) and the conduction loss (E_sync), which increases with output current. This indicates that a MOSFET with a low recovery charge and low drain-source on-resistance is the most efficient choice.