Optimising MOSFET performance – chip and package

The ongoing drive to improve power conversion performance while reducing system size and thermal dissipation is at the heart of today’s MOSFET development. And to achieve this, semiconductor manufacturers must consider both the underlying semiconductor processes and the packaging technology.

The image here shows the improvements in electrical performance brought about by some of the recent advances in device and package technology. As MOSFETs in the 5mm x 6mm footprint have evolved from UMOS VIII to UMOS IX-H technology, the new silicon has reduced R_DS(ON) by 42%, while the lower DFPR of the DSOP Advance package is shown to be responsible for an additional 25% reduction.