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> One-Gate Logic (L-MOS)

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Logic ICs

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CMOS Logic ICs
One-Gate Logic (L-MOS)

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One-Gate Logic(L-MOS)

As a pioneer of this product, Toshiba have been promptly responding to the customers' needs together with the family packages. Responding to a high demand for small, slim, low-voltage portable devices, we provide, for example, the smallest surface-mount type packages (fSV, 1 mm × 1 mm) in the industry.

One-Gate Logic(L-MOS) family series introduction chart

Selection table of One-Gate Logic (L-MOS) family
Type	Series	Part Number	Operating voltage range (V)	Propagation delay (ns)	Input Tolerant (V)	Output Tolerant (V)	Equivalent
5-V	Standard	TC4S TC4W	3 to 18	65 (@5.0V)	-	-	TC4000B
	High-Speed	TC7S TC7W	2 to 6	25/19 (@4.5V)	-	-	TC74HC
	High-Speed	TC7WT	4.5 to 5.5	31 (@4.5V)	-	-	TC74HCT
	Very High-Speed	TC7SH TC7WH TC7PH	2 to 5.5	9 (@4.5V)	0 to 5.5	-	TC74VHC
	Very High-Speed	TC7SET	4.5 to 5.5	10.3 (@4.5V)	0 to 5.5	-	TC74VHCT
Low-voltage	SHS	TC7SZ TC7PZ TC7WZ	1.8 to 5.5	5.5 (@3.0V)	0 to 5.5	0 to 5.5	TC74LCX

Ultra-Small One-Gate CMOS Logic in the 1010 Package

The 5-pin fSV (SOT-953) package, which measures 1.0 mm × 1.0 mm × 0.48 mm, occupies only 1.0 mm² of board space. It is ideal for applications that require high-density board assembly such as cell phones.

Ultra-Small One-Gate CMOS Logic Lineup in the 1010 Package

Ultra-Small and Thin fSV Package

Package Dimensions: 1.0 mm × 1.0 mm × 0.48 mm (typ.)
Lead pitch: 0.35 mm

This figure shows the ultra-small and thin fSV package.

Package Dimensions

This figure shows the outline dimensions of the ultra-small and thin fSV package.

Land Pattern Example

This figure shows a land pattern example for the ultra-small and thin fSV package.

·Before creating and producing designs and using, customers must also refer to and comply with the latest versions of all relevant TOSHIBA information and the instructions for the application that Product will be used with or for.

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One-Gate Logic(L-MOS)

Ultra-Small One-Gate CMOS Logic in the 1010 Package