SSM6P40TU

Not Recommended for New Design

Small-signal MOSFET 2 in 1

Description

Application Scope Power Management Switches / High-Speed Switching
Polarity P-ch×2
Generation U-MOSⅢ
Internal Connection Independent
Component Product (Q1) SSM6P40TU
Component Product (Q2) SSM6P40TU
AEC-Q101 Qualified(*)
RoHS Compatible Product(s) (#) Available

*: For detail information, please contact to our sales.

Package Information

Toshiba Package Name SOT-363F (UF6)
Package Image Toshiba SSM6P40TU Small-signal MOSFET 2 in 1 product UF6 package image
Package Code SOT-363F
Pins 6
Mounting Surface Mount
Width×Length×Height
(mm)
2.0×2.1×0.7
Package Dimensions View
Land pattern dimensions View
Ultra Librarian® CAD model
(Symbol, Footprint and 3D model)
Download from UltraLibrarian<sup>®</sup> in your desired CAD format<br>*1 *2

Download from UltraLibrarian® in your desired CAD format
*1 *2

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*1

Ultra Librarian® is a Registered trademark and CAD model library of EMA (EMA Design Automation, Inc.). CAD models (Symbol/Footprint /3D model) are provided by UltraLibrarian®. The footprints are generated based on the specifications of Ultra Librarian®.

*2

Please note that the footprint dimensions may differ from the reference Land Pattern dimensions provided on our website.

Absolute Maximum Ratings

Characteristics Symbol Rating Unit
Drain-Source voltage (Q1/Q2) VDSS -30 V
Gate-Source voltage (Q1/Q2) VGSS +/-20 V
Drain current (Q1/Q2) ID -1.4 A
Power Dissipation PD 0.5 W

Electrical Characteristics

Characteristics Symbol Condition Value Unit
Gate threshold voltage (Q1/Q2) (Max) Vth - -2.0 V
Drain-Source on-resistance (Q1/Q2) (Max) RDS(ON) |VGS|=10V 226
Drain-Source on-resistance (Q1/Q2) (Max) RDS(ON) |VGS|=4V 403
Input capacitance (Q1/Q2) (Typ.) Ciss - 120 pF
Total gate charge (Q1/Q2) (Typ.) Qg VGS=-10V 2.9 nC

Document

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Sep,2016

Feb,2019

Apr,2025

*

LTspice ® is a trademark and simulation software of ADI (Analog Devices, Inc.).

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