TZ2102XBG

Not Recommended for New Design

ApP Lite

Description

Feature Arm® Cortex®-A9 Clock:600MHz(Max) / DDR3/3L I/F, 1MB SRAM embeded / Graphics Acceleration, Camera input, LCD controller / Low power system technology, Long-term data retention / USB2.0/Ether
Application Scope Amusement system / Environment data mining system / Smart home appliance / User interface system
RoHS Compatible Product(s) (#) Available
I/O Camera input (Parallel) / DDR3/DDR3L / Ether / External Bus / I2C / I2S / LCD Output (Parallel) / SDIO/e∙MMC™ / SPI / UART / USB2.0
CPU Arm® Cortex®-A9 MPCore
FPU Available
RAM 1MByte SRAM / 32kByte SRAM(Back-up)
graphic engine TOSHIBA original graphics accelerator
Cache L1D Cache: 16kByte / L1I Cache: 16kByte / L2 Cache:128kByte
high speed interface controller USB2.0 host interface / USB2.0 device interface / 10/100 Ethernet MAC
DRAM controller DDR3/DDR3L×16bit
LCD controller WVGA(800×480) 60fps, 24bit Parallel I/F
Expansion bus I/F Address: 27bit, Data:32bit
Peripherals DMA controller / Timer/counter / RTC
Peripheral I/F Camera I/F, UART×4, I2C×4, I2S×2, SPIM×7, SPIB×2,PWM×6, 12bitADC×4, SDIO×3, eMMCx1, GPIO

Package Information

Toshiba Package Name P-LFBGA310-1616-0.80-001
Pins 310
Mounting Surface Mount
Package size 16mm x 16mm x 1.6mm
Pin pitch 0.8 mm

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