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Bushold circuit

A bushold circuit is added to the data input of an IC. Consisting of two inverters in a feedback loop, the bushold circuit holds (latches) the state at an input pin at its last known state whenever it is left open (i.e., floating). The following figure shows an equivalent circuit for a bushold circuit.

In the case of CMOS logic circuits, unused input pins assume the High-Z state if they are left open or floating. Typically, this situation is prevented by connecting external pull-up or pull-down resistors because the High-Z state causes input capacitance to be gradually charged by leakage current, eventually turning on the input P-channel and N-channel MOSFETs simultaneously and thereby causing undesired current or abnormal oscillation.
In contrast, the bushold circuit employs a weak feedback gate tied back to the input to hold the last input state until it changes state next time.
Therefore, ICs with a bushold circuit eliminate the need for external pull resistors. Additionally, the bushold circuit helps reduce current consumption, compared to the use of pull resistors, because the bushold circuit holds the input state immediately before the input assumes the High-Z state.
There are two electrical characteristics concerning the bushold circuit: 1) bushold input minimum drive hold current (II(HOLD)) that specifies the minimum current that the bushold circuit can supply to a device or a bus, and 2) bushold input overdrive current to change state (II(OD)) that specifies the minimum overdrive current necessary to change the state held in the bushold circuit. An example of bushold characteristics shown in the datasheet is given below.

Bus transceiver with bushold (TC74VCXH16245FT) Guaranteed bushold input currents (in μA)
Bus transceiver with bushold (TC74VCXH16245FT) Guaranteed bushold input currents (in μA)
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