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The NVIC block suspends the calculation processing that is running on the main core, and controls switching to prioritized processing.
It supports the system exception and interrupt occurrence.
If a high-priority exception interrupt is required during exception processing, then the NVIC block:
1) Suspends the exception being processed
2) Starts high-priority exception processing
3) Completes high priority exception processing
4) Resumes interrupted exception processing
It can control the nest, i.e. the exception interrupt processing.
It also includes the debug control function and SysTickTimer, which is a hardware timer for the operating system (OS) to manage tasks.
[Fe] Fetch stage
[De] Decode stage
[Ex] Execution stage
[MUL/DIV] Multiplication/Division
* Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.