Register Configuration

Register Configuration

Cortex®-M3 processors have registers R0 to R15.
R0 to R12 are general-purpose registers.
R13 is a register with a bank configuration that switches between two types of stack pointers.
R14 is the link register and R15 is the program counter.
Special registers that control the special features of the Cortex®-M3 processor are also available.

Chapter 2 Arm® Cortex®-M3

Hardware Configuration
NVIC (Nested Vectored Interrupt Controller)
Main Core
The Role of the Register
Stack Pointer
PUSH/POP to the Stack Pointer
Special Register
Operation Mode and Stack Pointer (1)
Operation Mode and Stack Pointer (2)
Exceptions (Reset, Interrupt, Fault, System Call)
The Role of NVIC
Tail Chain Control by NVIC
Memory Map
Memory Map for Arm® Cortex®-M3 Specifications
Memory Map of TMPM330: Example of TX03 Series
Vector Table (1)
Vector Table (2)
Bit Band Area and Bit Band Alias Area (1)
Bit Band Area and Bit Band Alias Area (2)

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