Register Configuration

Register Configuration

Cortex®-M3 processors have registers R0 to R15.
R0 to R12 are general-purpose registers.
R13 is a register with a bank configuration that switches between two types of stack pointers.
R14 is the link register and R15 is the program counter.
Special registers that control the special features of the Cortex®-M3 processor are also available.

Chapter 2 Arm® Cortex®-M3

Hardware Configuration
詳細資料
NVIC (Nested Vectored Interrupt Controller)
詳細資料
Main Core
詳細資料
The Role of the Register
詳細資料
PC, LR
詳細資料
Stack Pointer
詳細資料
PUSH/POP to the Stack Pointer
詳細資料
Special Register
詳細資料
Operation Mode and Stack Pointer (1)
詳細資料
Operation Mode and Stack Pointer (2)
詳細資料
Exceptions (Reset, Interrupt, Fault, System Call)
詳細資料
The Role of NVIC
詳細資料
Tail Chain Control by NVIC
詳細資料
Memory Map
詳細資料
Memory Map for Arm® Cortex®-M3 Specifications
詳細資料
Memory Map of TMPM330: Example of TX03 Series
詳細資料
Vector Table (1)
詳細資料
Vector Table (2)
詳細資料
Bit Band Area and Bit Band Alias Area (1)
詳細資料
Bit Band Area and Bit Band Alias Area (2)
詳細資料

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