PC, LR

PC, LR

Registers R15 (PC) and R14 (LR) control the program execution order.

Chapter 2 Arm® Cortex®-M3

Hardware Configuration
NVIC (Nested Vectored Interrupt Controller)
Main Core
Register Configuration
The Role of the Register
Stack Pointer
PUSH/POP to the Stack Pointer
Special Register
Operation Mode and Stack Pointer (1)
Operation Mode and Stack Pointer (2)
Exceptions (Reset, Interrupt, Fault, System Call)
The Role of NVIC
Tail Chain Control by NVIC
Memory Map
Memory Map for Arm® Cortex®-M3 Specifications
Memory Map of TMPM330: Example of TX03 Series
Vector Table (1)
Vector Table (2)
Bit Band Area and Bit Band Alias Area (1)
Bit Band Area and Bit Band Alias Area (2)

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