Logic Circuit: RS flip-flop Circuit

The “R” and “S” of the RS flip-flop circuit are abbreviations for "Reset" and "Set" respectively.

In order to have the memory function for flip-flop, it is necessary to retain the output state by giving feedback on the output state to the input.

When both R and S are “0”, if Q is “1”, it retains “1”, and if it is “0”, it retains “0”.
The state where Q stores "1" is called the set state, and the state where it stores "0" is called the reset state.

The output terminals have Q and Q, but the relation between Q and Q is always reversed.
In the operating conditions of the truth table, it has the condition which is prohibited, but if it is used by this condition, the next output cannot be determined.

Below in the right figure is a time chart of the RS flip-flop circuit. When the input signal “1” is set to S, the output terminal Q is set.
After that, if both S and R continue to be “0”, Q maintains the set state.
Next, if R becomes “1”, it is reset and the reset state is retained until the input signal is set to S again.

In this way, the RS flip-flop circuit has the property of storing a momentary signal as data.