Part Number Search

Cross Reference Search

About information presented in this cross reference

The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.

Keyword Search

Parametric Search

Stock Check & Purchase

Select Product Categories

Interrupt Processing: Maskable Interrupt

Maskable interrupt
Maskable interrupt

Here, “maskable” means "prohibited.“

When an interrupt request signal occurrs, the interrupt processing can be performed if the CPU is set to enable the interrupt.
If the interrupt is set to disable, the interrupt request signal is ignored and the interrupt processing is not performed.
The ignored interrupt request signal is retained until the interrupt request changes to enable or the command is cancelled by the program.

In this way, the maskable interrupt can enable or disable the interrupt processing freely.
It is usually set by the program.
The CPU receives the interrupt request signal, and the interrupt control circuit shifts to the interrupt processing operation.

Chapter 4 Toshiba Microcontrollers, Example of Core (TLCS-870/C1)

Overall Configuration of the CPU
Overall Configuration of the CPU: CPU Core (1)
Overall Configuration of the CPU: CPU Core (2)
Overall Configuration of the CPU: Program Counter
Overall Configuration of the CPU: General-purpose Register
Overall Configuration of the CPU: PSW (Flag)
Overall Configuration of the CPU: Stack and Stack Pointer
Interrupt Processing
Interrupt Processing: Interrupt Type
Interrupt Processing: Non Maskable Interrupt
A new window will open