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If multiple outputs from a general-purpose CMOS logic IC come into conflict, is the IC adversely affected?

Unlike diodes, the outputs of typical CMOS logic ICs cannot be wired-ORed together, except those with three-state outputs. Even in the case of CMOS logic ICs with three-state outputs, unintended current might flow, causing IC degradation, if they are enabled simultaneously. When creating a circuit design, ensure that multiple outputs will not be enabled at any given time. Also, the outputs of CMOS logic ICs without bushold become unstable if all of them are disabled (i.e., assume the High-Z state) without being pulled up to VCC or down to GND. 

Only the gates in the same package may be wired-ANDed to increase the drive capability (i.e., output current). However, it is recommended to use high-drive ICs (with an IO of ±24 mA) instead. 

Do not use multiple wired-OR gates.
Do not use multiple wired-OR gates.
Example of a parallel connection to increase drive capability (Only gates in the same package may be paralleled.)
Example of a parallel connection to increase drive capability (Only gates in the same package may be paralleled.)
Conflict of three-state outputs
Conflict of three-state outputs
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