Board design considerations for TVS diodes (ESD protection diodes)

Even TVS diodes with high ESD protection performance do not provide sufficient ESD protection without adequate board design. In particular, board design affects the instantaneous high-frequency pulse that occurs upon ESD entry.

The following figure compares the clamp voltage waveforms, depending on the distance of a TVS diode from a connector, and the ESD entry point. As can be seen from this figure, when a TVS diode is placed close to the connector (i.e., far from the IC under protection), the first peak voltage (i.e., the voltage immediately after ESD entry) is nearly 10 V lower than the case in which it is placed close to the IC.

The following considerations apply to board design:

1. Place a TVS diode as close as possible to the connector (to minimize the length of the L1 trace).
2. Reduce the lengths of L2 and L3 following the TVS diode.
3. Do not use via holes (through-holes) in the L2 and L3 traces.
4. Do not run ESD-protected lines connected to an ESD entry point in parallel with lines that are not protected from ESD. These lines should not run in parallel particularly from the ESD entry point to the TVS diode.