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The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.
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If a voltage exceeding the absolute maximum rated drain-source voltage VDSS is applied to the MOSFET, it will enter the breakdown region and will be destroyed. However, some products allow VDSS to be exceeded under the prescribed conditions described in the datasheet. This allowable amount of energy is called the avalanche capability.
Owing to the stray inductance of the circuit, the surge voltage of the MOSFET is superimposed on the voltage between drain and source at turn-off, and the drain-source voltage may break down if it exceeds the maximum rating of the device.
However, MOSFETs do not break even at voltage exceeding VDSS (rated voltage) when energy and drain current are within certain limits and temperature is under the rated channel temperature Tch. This is called avalanche capability. The allowable energy is called avalanche energy (EAS) and the current is called avalanche current (IAR).
Fig. 1 shows a MOSFET avalanche measurement circuit and Fig. 2 shows a MOSFET equivalent circuit for considering avalanche. The thinned area in Fig. 2 is part of the parasitic element. Fig. 3 shows the voltage and current waveforms of this measurement circuit. In Fig. 1, an inductance L is inserted into the circuit for measurement purposes instead of a stray inductance.
The voltage VDD is applied externally and the MOSFET is controlled by the gate voltage VGS. When the gate voltage is lowered at t0 and the MOSFET is turned off, the ID that was flowing when it was turned on does not immediately become zero and tries to continue flowing due to the influence of the inductance. As a result, the drain voltage VDS of the MOSFET rises and even exceeds the maximum drain-to-source voltage rating of VDSS, as shown in Fig. 3. Ultimately, the parasitic diode D1 in Fig. 2 enters avalanche break down and drain-to-source voltage VDS becomes BVDSS . If the current IAS is large at this time, the parasitic NPN transistor TR1 will turn on and a large current will flow, possibly destroying the MOSFET. Some MOSFETs allow the drain-to-source voltage VDS to momentarily exceed VDSS within acceptable limits.
Whether or not the avalanche capability is applicable and the range of application varies depending on each device. For details, please contact our sales representative or use the inquiry form on our website.
The following documents also contain related information.