Lineup Expansion of the "74AVC Series" Dual Power-Supply Bus Transceivers with New 1-bit and 2-bit Products

－Supporting communication interfaces such as UART, GPIO, and SPI－
Lineup Expansion of the "74AVC Series" Dual Power-Supply Bus Transceivers with New 1-bit and 2-bit Products

Toshiba Electronic Devices & Storage Corporation ("Toshiba") has expanded its lineup of dual power‑supply bus transceivers, the "74AVC Series" with four new 1‑bit products—74AVC1T45NX, 74AVCH1T45NX, 74AVC1T45FU, and 74AVCH1T45FU—and two new 2‑bit products—74AVC2T45FK and 74AVCH2T45FK.

In recent years, the rapid advancement of AI technologies has driven significant expansion in data center and edge AI[1] markets. Therefore, SoC systems[2] increasingly require higher performance with lower power consumption, leading to further reductions in operating voltage.
The 74AVC Series is designed to enable communication between such low‑voltage systems and conventional voltage systems. It is a level shifter capable of bidirectional voltage-level shifting between 0.7V or 0.8V[3] and up to 3.6V.

In addition to the existing 4-bit products, smaller bit configurations (1-bit and 2-bit) and small package variations—such as the leadless XSON6, the leaded SOT-363 (US6), and SOT-765 (US8)—are available, providing even greater flexibility in system design.
Furthermore, the newly launched 1-bit and 2-bit products, as with the existing products, employ a push-pull buffer[4] configuration to achieve high-speed operation, making them suitable for a wide range of applications such as UART[5], GPIO[6], and SPI[7] communication interfaces.

The 74AVC Series devices—including the new products—support dual power‑supplies without any power-on/off sequence restrictions. They adopt a clear directional-control method using DIR pins and a high-impedance control method using power-supply pins. The 74AVCH Series additionally includes an internal bus-hold function[8].

These features provide the following advantages:

  • Simplified power-on sequence design, helping to reduce the risk of malfunction
  • Prevention of signal-line contention through directional control and high-impedance mode, thereby improving system reliability
  • In the case of the 74AVCH Series, the bus-hold function avoids undefined states and enables stable signal retention, contributing to a reduction in external components such as pull-up and pull-down resistors

Toshiba will continue to expand its lineup of low-voltage logic ICs to meet increasingly diverse system‑design requirements and contribute to energy savings for a more efficient and sustainable society.

74AVC series
Part number Number of
circuits		 Supply voltage Package Size
(W×L×H, mm)		 Bus-hold
function
74AVC1T45NX 1-bit 0.7V to 3.6V XSON6 1.45×1.0×0.48 No
74AVCH1T45NX Yes
74AVC1T45FU 0.8V to 3.6V SOT-363 (US6) 2.0×2.1×0.9 No
74AVCH1T45FU Yes
74AVC2T45FK 2-bit SOT-765 (US8) 2.0×3.1×0.7 No
74AVCH2T45FK Yes
74AVC4T245FT[9] 4-bit (2×2-bit) 0.7V to 3.6V TSSOP16B 5.0×6.4×1.2 No
74AVCH4T245FT[9] Yes
74AVC4T345FT[9] 4-bit (3+1-bit) No

Notes:
[1] AI technology that performs data processing and analysis at the edge, where the data is generated, rather than in the cloud. The term "edge" refers to endpoint devices located close to users or the field, including smartphones, sensors, drones, surveillance cameras, and IoT devices.
[2] Abbreviation for system on a Chip (SoC), which refers to a system that integrates multiple functions onto a single semiconductor chip. Components such as the CPU (processor), memory, and input/output interfaces—which were traditionally implemented as separate ICs—are integrated into a single chip.
[3] Refer to the lineup above for the classification of power‑supply voltages.
[4] A circuit that combines NPN and PNP transistors (or NMOS and PMOS) in the output stage.
[5] UART (Universal Asynchronous Receiver/Transmitter): A transmit/receive circuit for asynchronous serial communication. A protocol used for transmitting and receiving data asynchronously.
[6] An abbreviation for General Purpose Input/Output, a general-purpose signal pin used in electronic devices, microcontrollers, and SoCs.
[7] Serial Peripheral Interface: Synchronous serial communication. A protocol used for transmitting and receiving data synchronously.
[8] A function that retains the previous input state (High or Low) even when the input pin becomes open (floating).
[9] Existing product

Features

  1. Low-voltage operation and flexible voltage support (0.7V or 0.8V to 3.6V)
  2. Suitable for UART, GPIO, and SPI communication interfaces
  3. Industry-standard-size small packages

Features Explanation

1. Low-voltage operation and flexible voltage support (0.7V or 0.8V to 3.6V)

Figure 1. Example of connecting the 74AVC series to two power-supply systems
Figure 1. Example of connecting the 74AVC series to two power-supply systems

The 74AVC series offers flexible voltage level shifting at low operating voltages, supporting a wide range of voltage systems.

  • 74AVC1T45NX, 74AVCH1T45NX: 0.7V to 3.6V
  • 74AVC1T45FU, 74AVCH1T45FU, 74AVC2T45FK, 74AVCH2T45FK: 0.8V to 3.6V
    Input/output voltages can be freely configured.

Either power-supply can serve as the source or destination for level-up/level-down conversion.

2. Suitable for UART, GPIO, and SPI communication interfaces

Figure 2. Example of level-shifting for the UART interface (2-Line) (using 74AVC1T45)
Figure 2. Example of level-shifting for the UART interface (2-Line) (using 74AVC1T45)

With a push-pull configuration that supports high-speed operation and 1-bit or 2-bit options that enable circuit configurations tailored to different communication interfaces, the products can be used with a wide range of interfaces such as UART, GPIO, and SPI.
In a two-line configuration for the UART interface, the 1-bit product (74AVC1T45) allows individual level-shifting of each line, while the 2-bit product (74AVC2T45) allows level-shifting two lines at a time in a four-line configuration. By selecting the appropriate bit width, the circuit can be configured.

Figure 3. Example of level-shifting for the UART interface (4-Line) (using 74AVC2T45)
Figure 3. Example of level-shifting for the UART interface (4-Line) (using 74AVC2T45)

3. Industry-standard-size small packages

Figure 4. Package and land pattern dimensions of XSON6, SOT-363 (US6), SOT-765 (US8)
Figure 4. Package and land pattern dimensions of XSON6, SOT-363 (US6), SOT-765 (US8)
  • 74AVC1T45NX, 74AVCH1T45NX: XSON6
  • 74AVC1T45FU, 74AVCH1T45FU: SOT‑363 (US6)
  • 74AVC2T45FK, 74AVCH2T45FK: SOT‑765 (US8)

They are offered in industry‑standard small packages.

Applications

Industrial equipment

  • Data centers, servers, communication equipment, FA equipment (such as programmable logic controllers (PLC)), testers, multifunction printers (MFP), POS terminals, power tools, etc.
    Consumer/personal equipment
  • Tablets, Laptop PCs, smartphones, audio devices, wearables

Main Specifications

Part number Without bus-hold 74AVC1T45NX 74AVC1T45FU 74AVC2T45FK
With bus-hold 74AVCH1T45NX 74AVCH1T45FU 74AVCH2T45FK
Packages Name XSON6 SOT-363 (US6) SOT-765 (US8)
Size W×L×H (mm) Typ. 1.45×1.0×0.48 2.0×2.1×0.9 2.0×3.1×0.7
Operating ranges Supply voltage VCCA, VCCB (V) 0.7 to 3.6 0.8 to 3.6
Output current IOUTA, IOUTB (mA) VCCA, VCCB
=3.0 to 3.6V		 ±12
Operating temperature Topr (°C) -40 to 125
DC Characteristics
(Ta=-40 to 85°C)		 High-level input voltage
VIHA, VIHB (V)		 VCCA, VCCB
=3.0 to 3.6V		 Min 2.0
Low-level input voltage
VILA, VILB (V)		 Max 0.9
Quiescent supply current
ICCA, ICCB (μA)		 Max 1 (74AVC1T45NX) 2 5
2 (74AVCH1T45NX)
AC Characteristics
(Ta=-40 to 85°C)		 Propagation delay time
tPLH/tPHL (ns)		 VCCA, VCCB
=3.0 to 3.6V		 Max 3.7 3.9
Sample check & availability Without bus-hold Buy Online Buy Online Buy Online
With bus-hold Buy Online Buy Online Buy Online

Related information

How to Level Shift Using One Gate Logic (PDF: 494KB)
Selection Guide 2026 Small Signal and Logic Devices (PDF: 8.7MB)

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