Input Rise and Fall Time Specifications

In the datasheet, the input rise and fall times of general-purpose CMOS logic ICs are specified in the operating ranges in which their functional operation is guaranteed.
Use CMOS logic ICs within the operating ranges to prevent a malfunction due to output oscillation etc.
If a slowly rising or falling signal (a low slew rate signal) is applied to an input, a current spike occurs during switching, causing VCC and GND bounce, which might result in output oscillation or a malfunction.

Use ICs with a Schmitt-trigger input for slowly changing inputs. However, in the case of excessively slowly changing inputs, even ICs with a Schmitt-trigger input might not be able to suppress noise on power supply or signal lines, resulting in output oscillation or instability.

The following table shows the rise and fall times of a typical IC*1 in each series.

By family input rise and fall times in each series
Type Series Name Series No. One-Gate Logic (L-MOS) Equivalents Operating Voltage Range (V) Propagation Delay Times*1, tpLH and tpHL (ns) Output Current*2, IOUT (mA) Rise and Fall Times at 3.3 V Rise and Fall Times at 5 V

For 5-V Systems

Standard TC40xxB
3 to 18 200
(at 5.0 V)
(at 5.0 V)
0 to 10000 ns *6 0 to 5000 ns *6
High Speed TC74HC TC7S
2 to 6 23
(at 4.5 V)
±4.0 or 6.0
(at 4.5 V)
(±2.0 in the case of TC7S)
0 to 1000 ns
at 2 V 
0 to 500 ns
at 4.5 V
TC74HCT TC7WT 4.5 to 5.5 28
(at 4.5 V)
- 0 to 500 ns


TC74AC - 2 to 5.5 8.5
(at 4.5 V)
(at 4.5 V)
0 to 100 ns/V 0 to 20 ns/V
TC74ACT - 4.5 to 5.5 9.0
(at 5.0 V)
- 0 to 10 ns/V

Very High Speed

2 to 5.5 8.5
(at 5.0 V)
(at 4.5 V)
0 to 100 ns/V 0 to 20 ns/V
(at 5.0 V)
- *5 - *5
TC7SET 4.5 to 5.5 9.5
(at 5.0 V)
- 0 to 20 ns/V
- 1.8 to 5.5 8.5
(at 5.0 V)
(at 4.5 V)
0 to 20 ms/V 0 to 1 ms/V

For low-voltage systems

Medium Speed TC74LCX
1.65 to 3.6
(1.65 to 5.5 in the case of TC7SZ/PZ/WZ)
(at 5.0 V)
(at 3.0 V)
0 to 10 ns/V -
High Speed TC74VCX 7UL 1.2 to 3.6
(0.9 to 3.6 in the case of 7UL)
(at 2.3 V)
(at 3.0 V)
(±8.0 in the case of 7UL)
0 to 10 ns/V -

*1: Maximum propagation delay time of typical ICs (TC4001, TC74HC244, TC74AC244, TC74VHC244, TC74LCX244, and TC74VCX244) at 85°C, except for the TC4001 for which the maximum propagation delay time at 25°C is shown
*2: Output current values are specified in the DC Characteristics table shown in the datasheet. Absolute maximum rated output current is specified separately.
*3: The TC7SET series does not have an output power-down protection function.
*4: The ICs of the TC7SZ series in the fSV package do not have an output power-down protection function except those with an open-drain output.
*5: Rise and fall times are not specified because the TC74VHC9 and 74VHC9 series provide Schmitt-trigger inputs.
*6: Rise and fall times are not specified in the datasheet. The values shown above should be considered only as a guide for creating a design.

Usage Considerations of CMOS Logic ICs

Handling of Unused Input Pins
Multiple Outputs from a General-Purpose CMOS Logic IC Come Into Conflict (Short-Circuiting)
Connecting a Load Capacitance to a CMOS Output Pin
Calculating the Operating Supply Current and Power Dissipation
Level Shifting Using an Input-Tolerant Function
Example of Application of the Power-Down Protection Function (Partial Power-Down)
Input-Tolerant and Output Power-Down Protection Functions Available with Each Series
Types of Noise to be Noted
Countermeasures for Reducing Switching Noise
Countermeasures for Signal Reflection
Countermeasures for Crosstalk
Countermeasures for Hazards
Countermeasures for Metastability
Countermeasures for Latch-Up
Countermeasures for ESD Protection


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