1-6. Level Shifting Using an Input-Tolerant Function

Equivalent input/output circuit for a CMOS logic IC without input-tolerant and power-down protection functions
Equivalent input/output circuit for a CMOS logic IC without input-tolerant and power-down protection functions

An input-tolerant function can be used for level shifting.
The input-tolerant function allows a voltage of up to the maximum operating voltage to be applied to an input while the power supply is active or at 0 V. The input-tolerant function allows level shifting from a higher voltage to a lower voltage.

Product selection options:
The 74VHC and 74LCX series can be used for conversion from 5 V to 3 V.
The 74VCX series can be used for conversion from 3 V to 1.2 V.

The following shows an equivalent circuit for a typical CMOS logic IC.

Level shifting using an input-tolerant function

The diodes on the input side are inserted for the purpose of ESD protection.
The diode between the input and the power supply might turn on if a voltage higher than VCC is applied or voltage is applied when the IC is off. In this case, the IC might be destroyed by the resulting large current. Device destruction can be prevented by using an IC with an input-tolerant function, i.e., an IC without a diode between the input and power supply.

Usage Considerations of CMOS Logic ICs

1-1. Handling of Unused Input Pins
1-2. Input Rise and Fall Time Specifications
1-3. Multiple Outputs from a General-Purpose CMOS Logic IC Come Into Conflict (Short-Circuiting)
1-4. Connecting a Load Capacitance to a CMOS Output Pin
1-5. Calculating the Operating Supply Current and Power Dissipation
1-7. Example of Application of the Power-Down Protection Function (Partial Power-Down)
1-8. Input-Tolerant and Output Power-Down Protection Functions Available with Each Series
1-9. Types of Noise to be Noted
1-9-1. Countermeasures for Reducing Switching Noise
1-9-2. Countermeasures for Signal Reflection
1-9-3. Countermeasures for Crosstalk
1-10. Countermeasures for Hazards
1-11. Countermeasures for Metastability
1-12. Countermeasures for Latch-Up
1-13. Countermeasures for ESD Protection

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