Products
Knowledge
This webpage doesn't work with Internet Explorer. Please use the latest version of Google Chrome, Microsoft Edge, Mozilla Firefox or Safari.
require 3 characters or more.
The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.
require 3 characters or more.
Register operation (PUSH and POP), when an exception occurs
Arm® Cortex®-M3 automatically performs PUSH and POP functions at the start and end of exception/interrupt handlers.
There are eight registers that automatically performs PUSH and POP; R00R3, R12, R14, R15, and xPSR.
Let's see PUSH and POP operations in a program flow example, when an exception/interrupt event occurs.
* Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.