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About information presented in this cross reference

The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.

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Is it possible to connect multiple IGBTs in parallel? If so, is there anything to note about parallel connection?

Gate resistor connections and parasitic inductances in the case of parallel-connected IGBTs
Gate resistor connections and parasitic inductances in the case of parallel-connected IGBTs

We recommend using an IGBT with higher ratings instead of connecting two IGBTs in parallel. In case of unavoidable parallel operation, please pay attention to the following points when designing.

  1. In the high-current region, the collector-emitter saturation voltage (VCE(sat)) of the IGBT has positive temperature dependence. However, many IGBTs exhibit negative temperature dependence in the low-current region as well as in the region in which they are actually used. If these IGBTs are connected in parallel, a greater proportion of current flows to the one with lower VCE(sat). This proportion increases as temperature rises. To balance current among parallel IGBTs, they should have an equal VCE(sat).
  2. If parallel-connected IGBTs are driven by a single external gate resistor (RG) connected in series with the gate, the IGBT gate-emitter voltage might oscillate, resulting in the oscillation of the collector voltage and current. To prevent such oscillation, it is necessary to add separate gate resistors (RG1 and RG2) to each IGBT and suppress the parasitic inductance of the closed-loop gate drive circuit.
  3. The parasitic inductance of the main circuit might cause oscillation, surge voltage, current imbalance, and other abnormal conditions during switching. A primary cause of these problems is parasitic inductances (LS*) as shown below. The board trace layout must be designed in such a manner as to reduce these parasitic inductances to as close to zero as possible. For parallel operation, the board traces from the main circuit must be designed in such a manner as to reduce LS1 and LS2, in particular, to zero.