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The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.
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For noise-sensitive loads such as analog circuits and IC power supplies, use an LDO with low output noise voltage (VNO) and a high ripple rejection ratio (R.R.). The sources of noise that appear at the output of an LDO can be broadly divided into two categories. One is the inherent noise generated within an LDO, which includes:
The other type of noise source is the ripple noise superimposed on the input voltage (supply voltage) of an LDO. Although an LDO internally suppresses ripple noise, some ripple still appears at the output. The ability of an LDO to suppress ripple in the input voltage to its output is called the power supply rejection ratio (PSRR) or the ripple rejection ratio (R.R.). Regarding ripple rejection ratio, also see the section “How can a low-noise power supply be created using an LDO regulator?” in the Frequently Asked Questions (FAQs) page on our website.
Please also refer to the following documents for related explanations.
Application note
FAQ
To product list of LDO ICs :
Main web page about LDO ICs:
Otherinformation