To reduce power consumption, data centers are embracing new rack architectures based on 48 V bus voltages. Learn how to design a half-bridge DC-DC converter to implement such a 48 V system.

The pressure on to scale up and build new data centers (Figure 1) to meet the increasing demands for data storage. This expansion is ultimately resulting in greater power consumption, along with demands for reducing the power loss.

One highly effective way of reducing the power consumption of a data center is to use the 48 V bus voltage for server racks. That said, such architectures are only practical by using carefully selected highly efficient MOSFETs.

To achieve better efficiency, power losses must be dealt with. The Open Rack architecture proposed by the Open Compute Project (OCP) addresses loss of power by using 48 V bus lines rather than conventional 12 V bus lines.

To understand how this works, start by recalling that the power loss caused by a power line is calculated using I2R, where R is the power line resistance, and I is the power line current. Based on this simple relationship between current and resistance, a lower current leads for the same level of resistance will lead to less power loss and more efficiency.

In the case of Open Rack architecture, consider the power loss when the same amount of power is supplied to server racks through 12 V bus lines vs. 48 V bus lines: the current that passes through a 48 V bus line is only 1/4 the current that passes through a 12 V bus line. Therefore, assuming the 48 V and 12 V bus lines have the same level of resistance, the 48 V bus will lose 1/16 the power of the 12 V one.

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To simplify the consideration, we use non-isolated buck DC-DC converter which is configured with two MOSFETs as shown in Figure 3 instead of the half-bridge DC-DC converter. When the power loss of half-bridge DC-DC converter is considered, the high-side MOSFET in Figure 3 corresponds to the primary side MOSFETs in Figure 2 (TR_{1}, TR_{2}) and the low-side MOSFET in Figure 3 corresponds to the secondary MOSFETs in Figure 2 (TR_{3}, TR_{4}).

The power losses shown in Figure 3 are generated on each MOSFET of the non-isolated buck DC-DC converter. These losses can be reduced drastically by using an appropriate MOSFET.

Table 1 shows specification of the half-bridge DC-DC converter and Figure 5 shows a block diagram of the converter.

By using appropriate MOSFETs, the half-bridge DC-DC converter achieves total efficiency of 92.8 % (Vin = 54.5 V, 30 % load) with just 160 mm x 100 mm board size.

On the secondary side, the built-in diodes will operate before the MOSFETs turn on, making conduction losses dominant. Therefore, we have selected TPHR6503PL which has the lowest drain-source on-resistance of 0.41 mΩ among our 30 V MOSFET lineup.

The Open Rack architecture proposed by OCP uses 48 V lines to reduce power consumption and improve efficiency. The half-bridge DC-DC converter supporting the 48 V bus system is one approach to efficient implementation.

DC-DC converters require careful selection of MOSFETs to be effective. We have selected TPN1200APL for the primary side MOSFET and TPHR6503PL for the secondary side MOSFET on the compact and highly efficient DC-DC converter reference design.

We offer high-quality and highly efficient MOSFETs with V_{DSS} ranging from 30 V to 250 V, as well as various drain-source on-resistance types in each V_{DSS} class, so engineers can find the right MOSFET when designing a DC-DC converter.

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