_{IN}) is defined in the electrical characteristics of the operational amplifier datasheet. This characteristic is input voltage that satisfies the electrical characteristics (CMRR, etc.) of the data sheet when the same signal is applied to the IN(+) and IN(-) terminals.

If the input signals of an op-amp are outside the specified common-mode input voltage range, the gain of the differential amplifier decreases, resulting in a distortion of the output signal. If the input voltage is even higher and exceeds the maximum rated differential input voltage, the device might deteriorate or be permanently damage.

_{B1}) determines the amount of current that flows to the differential input pair. Because of the current mirror circuit, the differential input pair basically provides Q_{n1} and Q_{n2} with the same current. As a result, V_{DS_qn2} is transferred to the output stage of the op-amp.

Suppose that V_{IN(+)} and V_{IN(-)} have dropped by ΔV. This causes the source-gate voltage (V_{SG}) of Q_{p2} and Q_{p3} to increase, which in turn causes their drain current to increase. Since the current source provides more current, the drain-source voltage of Q_{p1} (V_{DS_qp1}) also increases. As a result, the source-gate voltage (V_{SG}) of Q_{p2} and Q_{p3} decreases back to the previous level.

Therefore, the output of an op-amp remains unchanged when common-mode signals are applied to its differential input pair.

The assumption of the above operations is that the MOSFETs are in the saturation region.

Next, let's consider the conditions under which the MOSFET enters the saturation region. Fig. 2 shows the I_{ D}-V_{DS} curve of an N-channel MOSFET (SSM3K16). The drain current remains almost constant (ΔV/ΔI = high impedance) over the drain-source voltage (V_{DS}) range in the saturation region. The following relationship must be satisfied in order for the MOSFET to operate in the saturation region, where V_{th} is the gate-source voltage (V_{GS}) at which the drain current begins to flow.

V_{DS} > V_{GS} - V_{th }(1)

_{IN(+)} with respect to GND to determine its minimum value, V_{IN(+)_min}.

V_{IN(+)} = V_{GS_qn1} + V_{SD_qp2} – V_{SG_qp2 }(2)

At V_{IN(+)_min}, the source-drain voltage of Q_{p2} decreases to a level called the pinch-off voltage at which Q_{p2} is about to transition from the saturation region to the linear region. Let this voltage be V_{SD_qp2_min} and the threshold voltage of Q_{p2} at which the drain current begins to flow be V_{th_qp2}. Then, the following equation is obtained from Equation 1 that represents the saturation condition:

VSD_{_qp2_min} = V_{SG_qp2} – V_{th_Qp2 }(3)

Substituting Equation 2 into Equation 3 gives:

V_{IN(+)_min} = V_{GS_qn1} – V_{th_qp2} (4)

Up until this point, we have regarded MOSFETs as three-terminal devices. In actuality, however, there is one more terminal called the back gate. (In the case of typical discrete MOSFETs, the back gate is internally connected to the drain terminal.)

In the case of a P-channel MOSFET, when the back gate has higher voltage than the source, the depletion region expands, causing V_{th} to become higher. Therefore, the value of V_{th} in Equation 4 becomes higher when the back gates of Q_{p2} and Q_{p3} are connected to V_{DD}. In addition, V_{IN(+)_min} can be reduced to zero by reducing the pinch-off voltage (i.e., V_{GS_qn1} in Equation 4) through process optimization.

Next, we write an equation for V_{IN(+)} with respect to V_{DD} to determine its maximum value, V_{IN(+)_max}.

V_{IN(+)} = V_{DD} – V_{SD_qp1} – V_{SG_qp2 }(5)

When V_{IN(+)} is applied, the source-drain voltage of Q_{p2} (V_{SD_qp2}) increases, causing V_{SD_qp1} to reach the minimum saturation voltage (V_{SD_qp1_min}). If V_{SD_qp2} increases further, Q_{p1} enters the linear region, causing the drain current and the gain to decrease.

Therefore, op-amps with a differential input pair composed of P-channel MOSFETs can be used with an input voltage (common-mode input voltage) between GND and V_{DD} – (V_{SD_qp1} + V_{SG_qp2}) whereas those with a differential input pair composed of N-channel MOSFETs can be used with an input voltage between (V_{DS_qn1} + V_{GS_qn2}) and V_{DD}.

In contrast to these types of op-amps, the input differential stage of a rail-to-rail op-amp consists of an N-channel MOSFET pair and a P-channel MOSFET pair connected in parallel. The common-mode input voltage range of the rail-to-rail op-amp extends across almost the entire range from GND to V_{DD}.

The following documents also contain related information:

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