SJ-MOS (we call it DTMOS) forms a columnar P layer (P-pillar layer) on a part of N-layer and alternates P-N layers.
When VDS is applied, the depletion layer spreads over N-layer, which is the drifting layer. However, the spreads differently in the common D-MOS (called π-MOS in our case) and SJ-MOS. (See the electric field intensity diagram. The electric field intensity indicates the state in the depletion layer.)
In D-MOS, the interface between P/N-layers has the highest electric field strength, and breakover (breakdown phenomena) occurs when this part exceeds the limit of the material-silicon. This is the limit of the breakdown voltage. On the other hand, SJ-MOS has uniform electric field strength in N-layers.
As a consequence, SJ-MOS can be designed with lower-resistance N-layers, allowing for lower on-resistance.