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About information presented in this cross reference

The information presented in this cross reference is based on TOSHIBA's selection criteria and should be treated as a suggestion only. Please carefully review the latest versions of all relevant information on the TOSHIBA products, including without limitation data sheets and validate all operating parameters of the TOSHIBA products to ensure that the suggested TOSHIBA products are truly compatible with your design and application.
Please note that this cross reference is based on TOSHIBA's estimate of compatibility with other manufacturers' products, based on other manufacturers' published data, at the time the data was collected.
TOSHIBA is not responsible for any incorrect or incomplete information. Information is subject to change at any time without notice.

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How can I calculate fan-out?

The fan-out can be calculated by dividing the output current, IOH/IOL, of the driving IC by the input current, IIH/IIL, of the driven IC. However, if the driven ICs are CMOS devices, there is hardly any fan-out restriction in terms of direct current because of the very high input impedance of CMOS.

 

When calculating CMOS fan-out limits, an increase in the rise and fall times due to capacitive loads (sum of the input pin capacitances of the driven ICs and wire capacitances) should be taken into consideration. Ensure that the input rise and fall times meet the specifications and that the device does not malfunction because of reflections on transmission lines.

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